STA Application Engineer - Signoff, Automation & Training

Cadence Design Systems, Inc.; Austin (TX); On-site; USD 106,000 - 198,000; Full time

Benefits offered by this job

401(k) match

Stock purchase plan

Medical/dental/vision benefits

Job summary

Cadence Design Systems, Inc. is seeking a timing analyst to perform static timing analysis, glitch and noise analysis using Tempus Signoff, and to drive ECO and timing flows across advanced technologies.

You will work with R&D and customers to implement constraints, derates and PBA timing, contributing to end-to-end STA campaigns. You’ll automate flows with Perl, Tcl or Python and deliver technical trainings while supporting Cadence customers at sites and remotely.

Qualifications

• Experience with timing analysis and ECO flows.
• Knowledge of SDC constraints and OCV/SOCV concepts.
• Scripting skills in Perl, Python or Tcl for flow automation.

Responsibilities

• Perform Static Timing Analysis, glitch and noise analysis using Tempus Signoff.
• Execute and deliver timing analysis flows, ECO flows, CAD tools and methodologies.
• Work on SDC constraints, derates, PBA timing and distributed/concurrent STA flows.
• Collaborate with R&D and customers to enable timing analysis and ECO flows.
• Lead timing signoff campaigns and automate flows with scripting.

Skills

Tempus Signoff

Perl scripting

Python scripting

Tcl scripting

Tools

Tempus Signoff

Job description

Cadence Design Systems, Inc. is seeking a timing analyst to perform static timing analysis, glitch and noise analysis using Tempus Signoff, and to drive ECO and timing flows across advanced technologies.

You will work with R&D and customers to implement constraints, derates and PBA timing, contributing to end-to-end STA campaigns. You’ll automate flows with Perl, Tcl or Python and deliver technical trainings while supporting Cadence customers at sites and remotely.