SRAM/ROM Memory Compiler Engineer – Impactful Design (Austin)

NXP Semiconductors; Austin (TX); On-site; USD 125,000 - 175,000; Full time

Job summary

NXP Semiconductors in Austin is seeking an experienced memory circuit design engineer to drive SRAM/ROM memory compiler designs. You will implement CMOS memory circuits and work with layout and CAD teams to ensure performance, power, and area targets are met.

The role requires 8+ years in SRAM memory design, familiarity with Cadence Virtuoso, and strong scripting skills in Perl/Tcl/Python. Collaboration across global memory teams and adoption of GenAI tools are part of the scope.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering; Master’s preferred.
• 8+ years in SRAM memory circuit design.
• Experience with 5nm CMOS tech is a plus.
• Proficient in Cadence Virtuoso and EDA tools.
• Strong scripting with Perl, Tcl or Python.

Responsibilities

• Implement CMOS memory circuits for memory compiler performance, power, and area.
• Generate and evaluate simulations, bench­marks, and characterization measurements.
• Collaborate with layout teams to implement compiler leaf cells.
• Work with CAD teams to integrate designs into validation flows.
• Align designs with frontend models (behavioral/ATP/gemulation).

Skills

Memory circuit design

Cadence Virtuoso

Perl/Tcl/Python

Analytical thinking

Team collaboration

Education

B.S. Electrical Engineering

M.S. preferred

Job description

NXP Semiconductors in Austin is seeking an experienced memory circuit design engineer to drive SRAM/ROM memory compiler designs. You will implement CMOS memory circuits and work with layout and CAD teams to ensure performance, power, and area targets are met.

The role requires 8+ years in SRAM memory design, familiarity with Cadence Virtuoso, and strong scripting skills in Perl/Tcl/Python. Collaboration across global memory teams and adoption of GenAI tools are part of the scope.