Hybrid Memory Circuit Design Engineer | PPA Innovator

Intel Corporation; Austin, Northern (TX, KY); Hybrid; USD 164,000 - 269,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Retirement plan

Paid time off

Job summary

Intel Corporation's Memory Circuit Technology team in Austin seeks a Memory Circuit Design Engineer to drive advanced memory circuits for future CPUs and SoCs. You will develop SRAMs, caches, ROMs and other memories, collaborating with architecture, process tech and product engineering.

This hybrid role offers impact on memory architecture decisions and optimization of power, performance and area, contributing to Intel's next generation computing platforms.

Qualifications

• Proficiency in CMOS memory design and trade-offs for PPA.
• Experience with memory array/IP design and periphery circuits.
• Strong background in VLSI circuit design methodologies.

Responsibilities

• Technical readiness, memory circuit design, characterization and simulations.
• Cache design and critical path simulations.
• Memory path-finding and PPA optimization.
• Memory bit-cell and peripheral IC design and automation.
• Memory array/IP design and memory circuit innovation.
• Definition of methodologies and project schedules.

Skills

CMOS memory design

Memory design

VLSI design methods

Power-performance-PSA tradeoffs

Education

Bachelor's in Electrical/Computer Engineering

Master's in Electrical/Computer Engineering

PhD in related field

Tools

Industry standard digital circuit design tools

Job description

Intel Corporation's Memory Circuit Technology team in Austin seeks a Memory Circuit Design Engineer to drive advanced memory circuits for future CPUs and SoCs. You will develop SRAMs, caches, ROMs and other memories, collaborating with architecture, process tech and product engineering.

This hybrid role offers impact on memory architecture decisions and optimization of power, performance and area, contributing to Intel's next generation computing platforms.