SRAM Compiler Engineer & Memory Architect (Hybrid, San Jose)

TSMC - Taiwan Semiconductor Manufacturing Company Limited; California (MO); Hybrid; USD 135,000 - 225,000; Full time

Job summary

TSMC Technology, Inc. in San Jose is seeking a SRAM Design Engineer to drive next‑generation SRAM compilers and memory architectures, collaborating with architecture teams to optimize PPA for silicon performance.

This hands‑on IC role blends core circuit design with compiler automation, working with the local San Jose team and the HQ in Hsinchu. Hybrid schedule with 4 days in‑office is offered.

Qualifications

• Ph.D./MS/BS in EE or related field with relevant industry experience.
• Proven SRAM compiler development and custom memory design experience.
• High proficiency with Cadence and Synopsys analog/mixed-signal tools (Virtuoso, Spectre, HSPICE, FinES).
• Experience with sub-7nm process nodes (TSMC N5 or below) and automation scripting in Perl, Shell, TCL, Python.

Responsibilities

• Drive end-to-end SRAM/DRAM/NVM design and compiler timing/power characterization.
• Collaborate with logic and system teams to define memory specs and digital circuits.
• Lead SRAM compiler verification and QC flows for silicon-proven deliverables.
• Oversee layout execution and compiler code, guiding silicon bring-up and tests.
• Serve as liaison between San Jose R&D and HQ in Hsinchu for technology transfer.

Skills

SRAM design expertise

Automation scripting

Cross-team collaboration

Education

Ph.D. in Electrical Engineering or related field

MS in Electrical Engineering or related field

BS in Electrical Engineering or related field

Tools

Cadence Virtuoso

Synopsys (Spectre, HSPICE, FinES)

Job description

TSMC Technology, Inc. in San Jose is seeking a SRAM Design Engineer to drive next‑generation SRAM compilers and memory architectures, collaborating with architecture teams to optimize PPA for silicon performance.

This hands‑on IC role blends core circuit design with compiler automation, working with the local San Jose team and the HQ in Hsinchu. Hybrid schedule with 4 days in‑office is offered.