SRAM/ROM Circuit Design Engineer

NXP Semiconductors; Austin (TX); On-site; USD 125,000 - 175,000; Full time

Job summary

NXP Semiconductors in Austin is seeking an experienced memory circuit design engineer to drive SRAM/ROM memory compiler designs. You will implement CMOS memory circuits and work with layout and CAD teams to ensure performance, power, and area targets are met.

The role requires 8+ years in SRAM memory design, familiarity with Cadence Virtuoso, and strong scripting skills in Perl/Tcl/Python. Collaboration across global memory teams and adoption of GenAI tools are part of the scope.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering; Master’s preferred.
• 8+ years in SRAM memory circuit design.
• Experience with 5nm CMOS tech is a plus.
• Proficient in Cadence Virtuoso and EDA tools.
• Strong scripting with Perl, Tcl or Python.

Responsibilities

• Implement CMOS memory circuits for memory compiler performance, power, and area.
• Generate and evaluate simulations, bench­marks, and characterization measurements.
• Collaborate with layout teams to implement compiler leaf cells.
• Work with CAD teams to integrate designs into validation flows.
• Align designs with frontend models (behavioral/ATP/gemulation).

Skills

Memory circuit design

Cadence Virtuoso

Perl/Tcl/Python

Analytical thinking

Team collaboration

Education

B.S. Electrical Engineering

M.S. preferred

Job description

NXP’s Austin Memories team is seeking an experienced memory circuit design engineer for our SRAM and ROM internal memory compiler designs.

Our team is part of the Design Enablement/Foundation IP organization within the Chief Technology Office at NXP. We provide differentiating SRAM/ROM memory compiler solutions to NXP SoC design teams across multiple business lines- your work will have real impact for our design teams and, through them, our end products and end customers.

Job Summary:

• Implement design of CMOS memory circuits to meet memory compiler performance, power, and area requirements, including periphery circuits to support functional safety and scan functionality.
• Generate, execute, and evaluate simulation characterization measurements and simulation test benches, and compare vs. performance targets/benchmarks.
• Engage with layout teams on implementation of compiler leaf cells based on designs to improve area and performance.
• Work closely with CAD teams on implementation of new designs into our characterization, verification, and regression flows.
• Align with modeling/verification team to ensure consistency of designs with frontend models (behavioral/ATPG/emulation).
• Collaborate effectively across global memory teams to help ensure common methodologies and best practices.
• Leverage internally supported LLM/GenAI tools and EDA vendor GenAI solutions to implement efficiencies in design methodologies.

Job Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline. (Master’s degree is preferred).
• 8+ years of industry experience (6+ with Master’s degree) in SRAM memory circuit design, including some design experience with advanced CMOS foundry technologies at 5nm and beyond.
• Strong familiarity with Cadence Virtuoso and other industry-standard EDA tools.
• Familiarity with automotive design rules and memory design requirements is a plus.
• Good knowledge of scripting languages such as Perl, tcl, or Python is a must.
• Creative mindset, with strong analytical and problem-solving skills.

Job location:

• The position will be based at the NXP offices in Austin, Texas. Team members are expected to work in office at least 3 days/week.