Sr Solutions Engineer-FPGA/PCIe

Advanced Micro Devices; San Jose (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Advanced Micro Devices in San Jose, CA invites a senior engineer to architect and develop hardware/software co-design solutions for ASIC/FPGA-based acceleration across networking, storage, automotive, aerospace, and AI workloads.

You will design high-performance hardware acceleration engines and embedded software that orchestrates them to enable next-generation compute platforms. Collaboration across global teams is essential.

Qualifications

• Hands-on experience with ASIC/FPGA design and validation.
• Proficiency with SystemVerilog/Verilog and high-speed digital design.
• Knowledge of PCIe, AXI, DDR, and Ethernet; CXL/UAL desirable.
• Familiarity with UVM-based verification and emulation platforms (Palladium, Protium, Zebu).
• Hardware debugging experience.
• Automation scripting in Python, Tcl, Makefiles, and shell scripting.

Responsibilities

• Participate in all phases of the product development cycle from exploration to productization and support.
• Collaborate with architects, hardware and firmware engineers to implement new features.
• RTL Development: design, verify, and validate high-performance logic focusing on PCIe Gen6/7, CXL, UAL, Ethernet, DDR5/6.
• System Level Integration: use standard ASIC flows and Vivado to integrate IP with subsystems.
• Pre-Si verification and emulation to ensure correctness and performance.
• Post-Si validation and Bring-up, debugging complex interactions between hardware and embedded software.

Skills

ASIC/FPGA

SystemVerilog/Verilog

PCIe

AXI

DDR

Ethernet

UVM

Emulation

Hardware debugging

Python

Tcl

Makefiles

Shell scripting

Education

Bachelor's or Master's in Computer/Electrical Engineering

Tools

Vivado

Palladium

Protium

Zebu

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

Join our team to architect and develop cutting-edge hardware/software co-design solutions for ASIC/FPGA-based acceleration across a wide range of applications—such as networking, storage, automotive, aerospace, and emerging AI/ML workloads. You will design high-performance hardware acceleration engines and embedded software that orchestrates them, enabling next-generation compute platforms.

THE PERSON:

You are passionate about modern processor architecture, digital design, and system-levelvalidation. You thrive in collaborative environments, communicate effectively across global teams, and bring strong analytical and problem-solving skills. You are eager to learn and tackle complex technical challenges.

KEY RESPONSIBILITIES:

• Participate in technical role in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for Ips
• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to bedeveloped
• RTL Development: Design, verify, and validate high-performance logic using System Verilog/Verilog. You will focus on the data and control path, implementing deigns for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6.
• System Level Integration:Utilize thestandard ASIC flows , AMD (Xilinx) Vivado ecosystems to integrate custom IP with other subsystems
• Pre-Si Verification:Perform pre-silicon verification and emulation to ensure functional correctness and performance
• Post-Si Validation: Lead the "Bring-up" process in the lab. Perform post-silicon validation, debugging complex interactions between the embedded software and hardware fabric

PREFERRED EXPERIENCE:

• Hands-on experience with ASIC/FPGAs
• RTL Expertise: Expert inSystemVerilog/Verilog, synchronous design, and timing closure for high-speed logic
• Protocols: Knowledge of PCIe, AXI, DDR, and Ethernet. Familiarity with CXL or UAL is highly desirable
• Verification: Familiarity with UVM-based verification frameworks and emulation platforms (Palladium, Protium, Zebu)
• Validation: Experience in hardware debugging
• Tools:Proficiencyin Python,Tcl,Makefiles, and Shell scripting for automation

ACADEMIC CREDENTIALS:

• Bachelors orMastersdegree in computer engineering/Electrical Engineering

LOCATION:San Jose CA

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.