Senior Chip Lead Engineer-SoC/ASIC

Advanced Micro Devices; San Jose, Northern (CA, KY); On-site; USD 180,000 - 260,000; Full time

Job summary

Advanced Micro Devices (AMD) seeks a senior ASIC/FPGA design engineer to drive multi-disciplinary chip programs from architecture through production. You will act as a technical partner across cross-functional teams, delivering leadership and broad influence from day one.

You will thrive in ambiguity, balance depth with program-level perspective, and shape silicon from concept to ramp while coordinating with customers, foundries, and IP vendors.

Qualifications

• 10+ years of semiconductor industry experience.
• 8+ years hands-on ASIC/FPGA design experience.
• Experience across architecture, RTL, verification, physical design, and production ramp.
• Experience working in ambiguous environments and adapting to changing requirements.

Responsibilities

• Lead chip design initiatives from architectural concept through production release.
• Provide technical guidance across all phases of the chip development lifecycle.
• Drive technical decisions in evolving project environments.
• Interface with customers, foundries, IP vendors, and EDA tool suppliers.

Skills

Cross-functional collaboration

RTL design

Verilog/SystemVerilog

Leadership

Communication

Problem solving

Education

Bachelor's degree in Electrical/Electrical Engineering

Master's degree preferred

Tools

Verilog

SystemVerilog

VHDL

EDA tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE

We're seeking a T-shaped engineer ready to elevate their impact.

You're an experienced ASIC/FPGA design engineer who has delivered meaningful work and is now asking, "What's next?" You're ready to broaden your scope, deepen your influence, and tackle challenges that span the entire chip development spectrum, from architecture through production shipment.

This is not a traditional engineering role. You won't be confined to a single discipline or siloed within one functional area. Instead, you'll serve as a technical partner to chip leads across dynamic, cross-functional teams, bringing both breadth and depth to solve complex technical challenges.

You'll build the strategic perspective, cross-functional fluency, and leadership presence needed to own full chip programs while making significant technical contributions from day one. If you're energized by variety, collaboration, and the opportunity to shape silicon from concept through production, we'd love to talk.

THE PERSON

You are a technically versatile engineer with deep expertise in one or more semiconductor domains and a broad understanding of the complete chip development lifecycle.

You thrive in ambiguous environments, approach challenges with curiosity and a growth mindset, and continuously seek opportunities to expand your technical and leadership capabilities. You are self-directed, proactive, and collaborative, with the ability to influence teams and drive alignment without relying on formal authority.

You excel at balancing technical depth with program-level perspective and enjoy working across organizational boundaries to deliver successful products.

KEY RESPONSIBILITIES

Technical Leadership

• Lead chip design initiatives from architectural concept through production release.
• Provide technical guidance across all phases of the chip development lifecycle, engaging domain experts when appropriate.
• Drive technical decisions in ambiguous and rapidly evolving project environments.
• Develop a broad understanding of system-level tradeoffs while maintaining expertise in key technical areas.

Stakeholder Management & Cross-Functional Collaboration

• Partner with chip leads and program managers to support scheduling, resource planning, and risk mitigation.
• Interface with customers, foundries, IP vendors, and EDA tool suppliers.
• Coordinate activities across hardware, software, systems, validation, and product teams.
• Build alignment and drive consensus among diverse stakeholders.
• Navigated complex situations with limited direction and establish clear execution plans.

Problem Solving & Innovation

• Identify and resolve complex technical challenges throughout the design flow.
• Apply analytical thinking and creative problem-solving approaches to overcome obstacles.
• Drive continuous improvement in design methodologies, development processes, and engineering practices.
• Contribute to technical strategy and long-term organizational capability growth.

Required Qualifications

Industry Experience

• 10+ years of semiconductor industry experience.
• 8+ years of hands‑on ASIC and/or FPGA design experience.
• Demonstrated experience across multiple phases of chip development including:
  • Architecture definition and specification
  • RTL development
  • Verification and validation
  • Physical design
  • Package development
  • Power optimization
  • Silicon validation and characterization
  • Manufacturing and production ramp
  • System software development including device drivers and low-level software
• Experience working in ambiguous environments and adapting to changing requirements.

Technical Expertise

• Deep technical expertise in one or more semiconductor disciplines combined with a broad understanding of the full chip development lifecycle.
• Strong knowledge of:
  • SoC and subsystem architecture
  • RTL design and synthesis
  • Verification methodologies
  • Physical design principles
  • Timing closure
  • Power optimization techniques
  • Manufacturing test and DFT methodologies
  • Silicon bring-up and debug
  • Package development and production ramp processes
• Knowledge of ASIC and FPGA design tools and methodologies.
• Proficiency with Verilog, VHDL, and/or SystemVerilog.
• Working knowledge of industry‑ standard EDA tools.
• Understanding of semiconductor manufacturing processes.

Leadership & Communication

• Strong written and verbal communication skills.
• Ability to influence stakeholders and drive outcomes without formal authority.
• Proven collaboration across engineering, business, and organizational boundaries.
• Strong strategic thinking, prioritization, and problem‑solving abilities.
• Self‑directed with a demonstrated growth mindset and learning agility.

Preferred Qualifications

• Experience with advanced process nodes (7nm and below).
• Exposure to multiple chip architectures including CPU, GPU, FPGA, AI/ML accelerators, and networking devices.
• Background spanning both ASIC and FPGA development.
• Experience interacting directly with customers, vendors, foundries, and external partners.
• Prior technical leadership, mentoring, team leadership, or management experience.

ACADEMIC CREDENTIALS

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
• Master's degree preferred.

ADDITIONAL INFORMATION

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.