Sr. Principal Product Engineer

Cadence Design Systems; California (MO); Hybrid; USD 144,000 - 267,000; Full time

Benefits offered by this job

Paid vacation

Paid holidays

401(k) with employer match

Employee stock purchase plan

Medical, dental and vision plans

Job summary

Cadence Design Systems in California seeks a Sr. Principal Product Engineer to lead RTL to GDSII flow optimization and defect resolution. You will provide place-and-route expertise to customers and R&D, driving design benchmarks and new flows for advanced nodes.

You will combine hands-on timing analysis with strong communication to support digital implementation challenges at 16nm and below, including clock-tree synthesis and silicon signoff, in a dynamic, team-focused setting.

Qualifications

• MS in EE with 2+ years of experience in Digital Implementation, either as a design engineer or as a product engineer.
• Strong understanding of VLSI physical design and timing analysis; familiarity with digital implementation challenges including clock tree synthesis, routing optimization and silicon signoff.
• Experience with industry standard EDA tools in Synthesis, Physical design and Signoff at 16nm and below nodes.

Responsibilities

• Support Cadence products in the Digital and Signoff team.
• Track and debug customer issues and work with R&D and release team on issue resolution.
• Run design benchmarks and develop flows and solutions.

Skills

Digital Implementation

VLSI physical design

Timing analysis

Clock tree synthesis

Routing optimization

Silicon signoff

Perl scripting

Tcl scripting

Shell scripting

Strong communication

Education

MS in Electrical Engineering

Tools

EDA tools

Job description

Sr. Principal Product Engineer page is loaded## Sr. Principal Product Engineerlocations: HOME CAtime type: Full timeposted on: Posted Yesterdayjob requisition id: R56480## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.**This opportunity is for a Product Engineer in the Digital and Signoff Group (DSG) at Cadence. The Cadence Digital and Signoff Group will offer you a dynamic environment in which you will work with innovative R&D and Customer Engagement teams to influence the development of software tools for advanced chip design platforms. As Product Engineer, you will be a source of technical place and route expertise to Cadence customers and to R&D.You are a motivated and energetic engineer with a deep understanding of ASIC design methodologies and of every stage of the RTL to GDSII flow.You have proven hands-on experience with timing closure and PPA optimization at 16nm and below nodes.You combine your deep understanding with strong analysis skills to debug customer problems and propose solutions, with an organized and coherent approach.You are an excellent communicator.Position Responsibilities:Support Cadence products in the Digital and Signoff team.Track and debug customer issues and work with R&D and release team on issue resolution.Run design benchmarks and develop flows and solutions.Position Requirements:MS in EE with 2+ years of experience in Digital Implementation, either as a design engineer or as a product engineerStrong understanding of VLSI physical design and timing analysis; familiarity with digital implementation challenges including clock tree synthesis, routing optimization and silicon signoff.Experience with industry standard EDA tools in Synthesis, Physical design and Signoff at 16nm and below nodes.Exposure to, and solid understanding of, hierarchical design methodologies and low power designEnergetic team player with a passion for problem solvingStrong analysis skills with a track record to prove itStrong communication skills (verbal and written)Automation skills using Perl, Tcl and shell scripting*The annual salary range for California is $143,500 to $266,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.*## **We're doing work that matters. Help us solve what others can't.****Equal Employment Opportunity Policy:**Cadence is committed to equal employment opportunity throughout all levels of the organization.We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact [e-mail].**Privacy Policy:**Job Applicant If you are a job seeker creating a profile using our careers website, please see the .E-Verify Cadence participates in theE-Verify program in certain U.S. locations as required by law.Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.