Sr Principal Engineer -SIPI

Cadence Design Systems; San Jose (CA); Hybrid; USD 154,000 - 286,000; Full time

Benefits offered by this job

401(k) match

Employee stock purchase plan

Medical/Dental/Vision coverage

Job summary

Cadence Design Systems is hiring a Sr Principal SI/PI Engineer to join the HPP IP R&D Group. You will lead hands-on SI/PI design, testing, and model extraction for high-speed IP products, working closely with chip designers and customers to optimize performance.

The role requires a strong background in SerDes, PCB/FCBGA design, and IBIS-AMI simulations, with excellent communication skills to interact with internal teams and external customers.

Qualifications

• MS or Ph.D. in Electrical Engineering (or similar).
• 3+ years of experience with high speed SerDes and PHYs.
• Strong understanding of high speed SerDes architecture.
• Hands-on lab experience with high speed instruments (oscilloscopes, TDRs, VNAs, spectrum analyzers).
• Experience with 3D/2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave.
• Experience with IBIS-AMI model simulations.
• Experience with lab measurement correlation to simulations.
• Good understanding of PCB and FCBGA design rules.

Responsibilities

• Work on test chip package SI/PI optimization and verification.
• Develop evaluation board design optimization for SI/PI performance.
• Provide extracted and measured channel models for chip designers.
• Help with package and PCB SI/PI design guidelines and customer support.
• Review customer package and board designs and simulation results.
• Provide feedback to customers to optimize IP performance.
• Perform link simulations using S-parameter models and IBIS-AMI models.
• Assist with SI/PI debugging for test chips or customer ASICs.

Skills

SerDes architecture

Debugging

Communication

Lab problem solving

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

IBIS-AMI

Sigrity Clarity

PowerSI

Ansys HFSS

SIwave

Oscilloscopes

TDRs

VNAs

Spectrum Analyzers

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Sr Principal Enginee This is a unique opportunity to join the HPP IP R&D Group at Cadence Design Systems. We are looking for a Sr Principal SI/PI Engineer who will be a key contributor to our advanced high speed IP products. This is a hands on technical position.

Main Job Tasks and Responsibilities

• Work on test chip package design SI/PI optimization and verification.
• Work on evaluation board design optimization for best SI/PI performance.
• Provide extracted and measured channel models for chip designers in the R&D team.
• Help with package and PCB SI/PI design guidelines and customer support on SI/PI related inquiries.
• Review customer package and board designs and simulation results.
• Help with providing feedback to customers to ensure best possible performance of our IP in their ASIC.
• Work on link performance simulations using S-parameter channel models and IBIS-AMI behavioral models.
• Help with SI/PI related debug of test chips or customer ASICs in the lab.

Position Requirements

• M.S. or Ph.D. Electrical Engineering (or similar degree)
• 3+ years of experience preferably working with high speed SerDes and PHYs
• Good understanding of high speed SerDes architecture
• Hands on lab experience with instruments like high speed oscilloscopes, TDRs, VNAs, spectrum analyzers, etc.
• Fluent with using 3D and 2.5D extraction tools like Sigrity Clarity/PowerSI or Ansys HFSS/SIwave
• Experience with IBIS-AMI model simulations
• Experience with simulation result to lab measurement correlation
• Good understanding of PCB and FCBGA design rules and requirements
• Strong debugging and problem-solving skills
• Excellent communication and presentation skills to effectively communicate with both customers and internal stake holders

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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Download More Information on E-Verify (64K) Cadence plays a critical role in creating the technologies that modern life depends on.

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Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

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