SR PRINCIPAL DESIGN ENGINEER

Semiconductor Engineering; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Cadence is seeking a highly skilled professional to join our North America Palladium and Protium HW Development team. You will work directly with leading semiconductor and systems companies to develop and deploy hardware emulation and FPGA prototyping platforms.

The role bridges customers with AE, PE, and R&D to deliver deep technical support and pioneering verification methodologies for complex architectural and high-speed protocol challenges.

Responsibilities

• Develop and deploy Cadence hardware emulation and FPGA prototyping platforms.
• Bridge customer requirements with AE, PE and R&D to deliver impactful verification solutions.
• Provide deep R&D technical support and pioneer innovative verification methodologies for high-speed protocol challenges.

Job description

Join our North America Palladium and Protium HW Development team and help shape the future of system-level chip design verification. In this highly visible, customer-facing role, you will work directly with industry-leading semiconductor and systems companies to develop and deploy Cadence’s market-leading hardware emulation and FPGA prototyping platforms. You will bridge the gap between customers, Applications Engineering (AE), Product Engineering (PE), and R&D — develop impactful customer solutions, delivering deep R&D technical support, and pioneering innovative verification methodologies to solve our customers’ most complex architectural and high-Speed Protocol challenges.