Cadence is hiring a Principal Product Engineer for System Verification, Emulation in San Jose, CA. The role involves driving customer engagements, analyzing verification environments, and partnering with R&D to optimize hardware emulation. Candidates should possess a Bachelor’s degree and at least 7 years of experience in RTL verification with proficiency in Verilog/SystemVerilog, C/C++, and Python. Strong analytical and communication skills are essential. This position offers a dynamic environment and the chance to influence product development.
Qualifications
Minimum of 7 years of experience or 5 years with a Master's degree.
6-8 years of hands-on experience in RTL verification.
Strong fundamentals in digital logic design.
Working knowledge of simulation-based verification methodologies.
Effective written and verbal communication skills.
Responsibilities
Independently drive Palladium hardware emulation engagements with customers.
Own the technical relationship for assigned customers.
Act as a technical mentor and subject-matter expert.
Skills
RTL verification
Digital logic design
Verilog/SystemVerilog
Linux-based development environments
C/C++
Python
Analytical skills
Problem-solving skills
Education
Bachelor’s degree in Electrical Engineering
Master’s degree in Electrical Engineering
PhD in Electrical Engineering
Tools
EDA workflows
Job description
Cadence is hiring a Principal Product Engineer for System Verification, Emulation in San Jose, CA. The role involves driving customer engagements, analyzing verification environments, and partnering with R&D to optimize hardware emulation. Candidates should possess a Bachelor’s degree and at least 7 years of experience in RTL verification with proficiency in Verilog/SystemVerilog, C/C++, and Python. Strong analytical and communication skills are essential. This position offers a dynamic environment and the chance to influence product development.