Senior Principal Design Engineer - Hardware Verification

Semiconductor Engineering; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Cadence is seeking a highly skilled professional to join our North America Palladium and Protium HW Development team. You will work directly with leading semiconductor and systems companies to develop and deploy hardware emulation and FPGA prototyping platforms.

The role bridges customers with AE, PE, and R&D to deliver deep technical support and pioneering verification methodologies for complex architectural and high-speed protocol challenges.

Responsibilities

• Develop and deploy Cadence hardware emulation and FPGA prototyping platforms.
• Bridge customer requirements with AE, PE and R&D to deliver impactful verification solutions.
• Provide deep R&D technical support and pioneer innovative verification methodologies for high-speed protocol challenges.

Job description

Cadence is seeking a highly skilled professional to join our North America Palladium and Protium HW Development team. You will work directly with leading semiconductor and systems companies to develop and deploy hardware emulation and FPGA prototyping platforms.

The role bridges customers with AE, PE, and R&D to deliver deep technical support and pioneering verification methodologies for complex architectural and high-speed protocol challenges.