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GCS Recruitment is seeking a senior EE to lead bring-up and validation of satellite boards in our Seattle-area lab. You will own power-on, section checks, and root-cause debugging for multi-layer boards built around custom ASICs/SoCs.
You will plan verification campaigns, document results, and partner with design and RF/antenna teams on next-gen board designs. A BSEE/MSEE or equivalent and hands-on lab skills are required.
The team designs the satellites' phased-array antenna electronics: meter-wide, 20+ layer boards carrying thousands of components - including three families of Amazon custom silicon (beamforming, modem, network processing) - linked by ~25 Gbps high-speed digital buses. Boards are coming back from fabrication faster than the design team can validate them. That's where you come in: senior EEs who can do real board design and own hardware in the lab.
Boards built around custom ASICs/SoCs; RF familiarity as a secondary skill; FPGA familiarity; Python bench automation