PCB Designer

GCS Recruitment; Oregon; On-site; USD 120,000 - 180,000; Full time

Job summary

GCS Recruitment is seeking a senior hardware engineer to spearhead board-level design for satellites’ phased-array antenna electronics. You will own lab bring-up, validation, and debug on meter-wide, multi-layer boards with thousands of components and custom silicon.

You’ll plan verification campaigns, perform high-speed testing, and collaborate with the RF/antenna team to support measurements. A strong lab skillset and proven SI/PI abilities are essential.

Qualifications

• Experience in board-level schematic capture and dense multilayer PCBs.
• Hands-on lab bring-up and validation with high-speed test gear.
• Experience with high-speed serial interfaces (JESD204, PCIe, 25G+).

Responsibilities

• Lead bring-up of newly fabricated boards: power-on, section-by-section checkout, first-time debug to root cause.
• Plan and run design verification/validation campaigns - high-speed link testing, power measurements, functional test - and document results to program standards.
• Partner daily with the design team; drive fixes into the next board revision.
• Contribute to schematic and layout work on next-generation boards as bandwidth allows.
• Hand off validated hardware to the RF/antenna team and support their measurement needs.

Skills

Board-level design

Schematic capture

High-speed digital design

Lab bring-up

Power delivery

Signal integrity

JESD204/PCIe/25G+ Ethernet

Education

BSEE or MSEE

Tools

Oscilloscopes

Logic analyzers

High-speed test gear

PCB design tools

Job description

The team designs the satellites' phased-array antenna electronics: meter-wide, 20+ layer boards carrying thousands of components - including three families of custom silicon (beamforming, modem, network processing) - linked by ~25 Gbps high-speed digital buses. Boards are coming back from fabrication faster than the design team can validate them. That's where you come in: senior EEs who can do real board design and own hardware in the lab.

• Lead bring-up of newly fabricated boards: power-on, section-by-section checkout, first-time debug to root cause.
• Plan and run design verification/validation campaigns - high-speed link testing, power measurements, functional test - and document results to program standards.
• Partner daily with the design team; drive fixes into the next board revision.
• Contribute to schematic and layout work on next-generation boards as bandwidth allows.
• Hand off validated hardware to the RF/antenna team and support their measurement needs.

What we're looking for

• Experience of EE board-level design: schematic capture, complex dense multilayer PCBs, power delivery and sequencing.
• Hands-on lab strength - the heart of this role: board bring-up, debug, and validation; fluency with oscilloscopes, logic/protocol analyzers, and high-speed test gear.
• High-speed digital experience: multi-gigabit SerDes/interfaces (e.g., JESD204, PCIe, 25G+ Ethernet, DDR) and signal/power integrity awareness.
• Full lifecycle experience: design -> build -> bring-up -> validation -> manufacturing support.
• BSEE or MSEE (or equivalent experience).