Hardware Engineer

GCS Recruitment; California City (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

GCS Recruitment seeks a senior EE to own hardware in the lab, leading board bring-up and verification of high-speed, multi-layer PCBs. You will validate power sequencing and debug complex issues, collaborating with the design and RF/antenna teams.

You should have hands-on lab strength, experience with high-speed test gear and SerDes interfaces, and a full lifecycle background from design to manufacturing support.

Qualifications

• Experience in board-level design: schematic capture and dense multilayer PCBs.
• Hands-on lab strength: bring-up, debug, validation with high-speed test gear.
• Familiarity with high-speed SerDes/interfaces (JESD204, PCIe, 25G+ Ethernet, DDR).
• Full lifecycle involvement from design to manufacturing support.
• Degree in electrical engineering (BSEE/MSEE) or equivalent.

Responsibilities

• Lead bring-up of newly fabricated boards: power-on, section checks, root-cause debug.
• Plan and run verification campaigns: high-speed link testing, power measurements, functional tests.
• Collaborate daily with design team; drive fixes into next board revision.
• Contribute to schematic and layout work for next-generation boards.
• Support RF/antenna team measurements with validated hardware.

Education

BSEE / MSEE (or equivalent)

Tools

Cadence Allegro

Altium

Oscilloscopes

Logic analyzers

Job description

The team designs the satellites' phased-array antenna electronics: meter-wide, 20+ layer boards carrying thousands of components - including three families of custom silicon (beamforming, modem, network processing) - linked by ~25 Gbps high-speed digital buses. Boards are coming back from fabrication faster than the design team can validate them. That's where you come in: senior EEs who can do real board design and own hardware in the lab.

• Lead bring-up of newly fabricated boards: power-on, section-by-section checkout, first-time debug to root cause.
• Plan and run design verification/validation campaigns - high-speed link testing, power measurements, functional test - and document results to program standards.
• Partner daily with the design team; drive fixes into the next board revision.
• Contribute to schematic and layout work on next-generation boards as bandwidth allows.
• Hand off validated hardware to the RF/antenna team and support their measurement needs.

What we're looking for

• Experience of EE board-level design: schematic capture, complex dense multilayer PCBs, power delivery and sequencing.
• Hands-on lab strength - the heart of this role: board bring-up, debug, and validation; fluency with oscilloscopes, logic/protocol analyzers, and high-speed test gear.
• High-speed digital experience: multi-gigabit SerDes/interfaces (e.g., JESD204, PCIe, 25G+ Ethernet, DDR) and signal/power integrity awareness.
• Full lifecycle experience: design -> build -> bring-up -> validation -> manufacturing support.
• BSEE or MSEE (or equivalent experience).