Sr. Design Verification Engineer

ArcTern Ventures; San Jose (CA); Sur place; USD 130 000 - 160 000; Plein temps

Résumé du poste

HYPERLUME in San Jose, CA, is seeking a Senior DV Engineer to develop reusable SV-UVM testbenches, verify PCIe subsystems and other interfaces, and write assertions/coverage.

The role involves reproducing silicon failures in simulation and ensuring robust verification flows in a fast-paced environment.

Qualifications

• Senior DV Engineer to develop reusable SV‑UVM testbenches and verify PCIe subsystems and other interfaces.

Responsabilités

• Verify PCIe subsystems and other interfaces.
• Reproduce silicon failures in simulation.

Connaissances

SV-UVM testbenches

PCIe verification

Description du poste

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HYPERLUME

Design

San Jose, CA, USA

USD 130k-160k / year

About the role Senior DV Engineer to develop reusable SV‑UVM testbenches, verify PCIe subsystems and other interfaces, write assertions/coverage, and reproduce silicon failures in simulation.