Sr Analog Design Engineer — High-Speed SerDes

Flux Computing; Austin (TX); On-site; USD 180,000 - 280,000; Full time

Benefits offered by this job

Equity & Ownership

Living-Local Bonus

Retirement benefits

Proximity Bonus

Job summary

OLIX in Austin, TX is seeking a Senior/Staff Analog Design Engineer to contribute to high-speed SerDes and mixed-signal subsystems for a next-generation SoC, spanning from circuit implementation through post-silicon validation.

This in-office role collaborates with London/Bristol teams to drive global execution and requires a strong hands-on circuit design background and solid grasp of high-speed signaling fundamentals.

Qualifications

• MS or PhD in Electrical Engineering with 10+ years of analog/mixed‑signal IC design experience.
• Strong analog mixed‑signal design background with hands‑on SerDes experience at data rates of 25 Gbps or higher.
• Solid understanding of high-speed signaling concepts: jitter, noise, equalization, signal integrity, and link budgeting.
• Proficiency with Cadence Virtuoso, Spectre, and industry‑standard simulation flows including PVT, Monte Carlo, EM-IR, and reliability analysis.

Responsibilities

• Architect and design high-speed SerDes blocks (serializers, TX drivers, TIAs, CTLEs, CDRs, deserializers, and clock generation) from specification through silicon in advanced FinFET nodes.
• Perform schematic and post-layout simulations (including EM-IR and reliability simulations) to ensure robust silicon margins, and own design reviews and documentation.
• Run EM simulations for passives, package interconnects, and on-die routing.
• Develop behavioral and Verilog-A models to enable system-level and mixed-signal verification.
• Supervise mask designers closely and provide floorplan and layout guidelines.
• Collaborate with optical, digital, and system teams on interfaces and link-level performance.
• Support post-silicon bring-up, lab validation, and debug.

Skills

SerDes design

Analog/mixed-signal IC design

High-speed signaling

Cadence Virtuoso

Verilog-A modeling

EM/ reliability analysis

Layout-sensitive design

Communication

Education

MS or PhD in Electrical Engineering

Tools

Cadence Virtuoso

Cadence Spectre

EM-IR simulations

Reliability analysis tooling

Job description

OLIX in Austin, TX is seeking a Senior/Staff Analog Design Engineer to contribute to high-speed SerDes and mixed-signal subsystems for a next-generation SoC, spanning from circuit implementation through post-silicon validation.

This in-office role collaborates with London/Bristol teams to drive global execution and requires a strong hands-on circuit design background and solid grasp of high-speed signaling fundamentals.