Senior SerDes Analog Designer — 100Gbps+ High-Speed Hybrid

Mulya Technologies; Austin (TX); Hybrid; USD 120,000 - 150,000; Full time

Job summary

Mulya Technologies is in Austin, Texas, seeking a SerDes Analog Designer to develop cutting-edge circuits and architectures for ultra-high-speed wireline communication systems. The role involves driving transistor-level designs from specification to market introduction.

The ideal candidate will have over 10 years of experience in high-performance analog or mixed-signal IC development, strong analytical skills, and proficiency in Cadence tools.

Qualifications

• 10+ years of experience in high‑performance analog or mixed‑signal IC development in advanced CMOS processes.
• Strong understanding of transistor‑level circuit design including noise and mismatch analysis.
• Experience with evaluating silicon on bench and familiarity with standard lab equipment.

Responsibilities

• Develop cuttings circuits and architectures for ultra‑high speed wireline communication systems.
• Drive the development of high performance transistor level design from initial specification to market introduction.

Skills

High‑performance analog or mixed‑signal IC development

High‑speed analog design and building block circuits for SERDES

Evaluating silicon on bench

Transistor‑level circuit design

Cadence schematic capture

Layout parasitic extraction

Tools

Cadence Virtuoso

HSPICE

MATLAB

Job description

Mulya Technologies is in Austin, Texas, seeking a SerDes Analog Designer to develop cutting-edge circuits and architectures for ultra-high-speed wireline communication systems. The role involves driving transistor-level designs from specification to market introduction.

The ideal candidate will have over 10 years of experience in high-performance analog or mixed-signal IC development, strong analytical skills, and proficiency in Cadence tools.