Spaceborne FPGA Engineer: RTL & High-Speed Links

GCS Recruitment; Redmond (WA); On-site; USD 150,000 - 210,000; Full time

Job summary

GCS Recruitment represents a client building one of the world’s largest LEO satellite constellations. Senior FPGA Engineer will design, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs, bringing up high-speed transceivers and 25G/50G/100G links for space-grade hardware.

You will develop embedded Linux environments with PetaLinux/Yocto, drive timing closure on modern devices, and collaborate with hardware teams to validate designs and create diagnostic tools. U.S.

Qualifications

• 8+ years of FPGA/RTL development experience using Verilog, SystemVerilog, or VHDL.
• Hands-on experience with high-speed serial transceivers (GTY/GTM) and/or 25G/50G/100G Ethernet.
• Proven board bring-up and hardware debugging experience.
• Experience achieving timing closure on modern FPGA devices.
• U.S. Citizenship or Permanent Residency required.

Responsibilities

• Design, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs.
• Configure and bring up GTY-class transceivers and debug 25 Gbps+ serial links.
• Implement and validate high-speed Ethernet solutions using MRMAC/CMAC IP (25G/50G/100G).
• Develop and maintain embedded Linux environments using PetaLinux/Yocto.
• Perform FPGA and board bring-up using JTAG, ILA, and lab test equipment.
• Work closely with hardware engineers to support system validation and debugging.
• Create diagnostic and monitoring tools to support development and test activities.

Skills

FPGA RTL development

Verilog/SystemVerilog/VHDL

GTY/GTM transceivers

25G/50G/100G Ethernet

US citizenship or PR

Tools

AMD/Xilinx Versal ACAP

UltraScale+ platforms

PetaLinux/Yocto

Job description

GCS Recruitment represents a client building one of the world’s largest LEO satellite constellations. Senior FPGA Engineer will design, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs, bringing up high-speed transceivers and 25G/50G/100G links for space-grade hardware.

You will develop embedded Linux environments with PetaLinux/Yocto, drive timing closure on modern devices, and collaborate with hardware teams to validate designs and create diagnostic tools. U.S.