Senior FPGA Engineer - Space-Borne RTL & 100G Links

GCS Recruitment; Coronado (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

GCS Recruitment is partnering with a space-tech client to hire a Senior FPGA Engineer for a growing LEO satellite constellation.

You will design and verify RTL on AMD/Xilinx Versal and UltraScale+ devices, bring up high-speed transceivers, and develop embedded Linux environments with PetaLinux/Yocto. This on-site role in Coronado, CA offers exposure to cutting-edge aerospace hardware and collaboration with hardware engineering teams.

Qualifications

• 8+ years of FPGA RTL development using Verilog/SystemVerilog or VHDL.
• Hands-on with GTY/GTM transceivers and 25G/50G/100G Ethernet.
• Board bring-up and hardware debugging experience.
• Timing closure on modern FPGA devices.
• U.S. Citizenship or Permanent Residency required.

Responsibilities

• Design, integrate, and debug RTL on AMD/Xilinx Versal and UltraScale+ FPGAs.
• Configure and bring up GTY-class transceivers and debug 25 Gbps+ links.
• Implement high-speed Ethernet solutions using MRMAC/CMAC IP (25G/50G/100G).
• Develop embedded Linux environments with PetaLinux/Yocto.
• Perform FPGA and board bring-up using JTAG, ILA, and lab test equipment.
• Collaborate with hardware engineers to support system validation and debugging.
• Create diagnostic and monitoring tools to support development and test activities.

Skills

FPGA RTL development

Verilog/SystemVerilog/VHDL

High-speed transceivers

Hardware debugging

Embedded Linux

Tools

PetaLinux

Yocto

JTAG

ILA

Job description

GCS Recruitment is partnering with a space-tech client to hire a Senior FPGA Engineer for a growing LEO satellite constellation.

You will design and verify RTL on AMD/Xilinx Versal and UltraScale+ devices, bring up high-speed transceivers, and develop embedded Linux environments with PetaLinux/Yocto. This on-site role in Coronado, CA offers exposure to cutting-edge aerospace hardware and collaboration with hardware engineering teams.