Space Electronics Lead Engineer — High-Ridelity Payloads

MIT Lincoln Laboratory; Lexington (MA); On-site; USD 145,000 - 220,000; Full time

Benefits offered by this job

Health plans and benefits

Pension plan

401K matching

Paid leave

Job summary

MIT Lincoln Laboratory’s Electronics for Contested Space Group seeks a space electronics lead engineer to lead a team of electrical engineers in the design, integration, and test of next‑gen space payloads and systems. You will work on digital, analog, RF, and power designs, coordinating with payload, systems, firmware, and software leads to inform design trades and review outcomes.

The ideal candidate is self-driven, mentored junior staff, and capable of assessing risk with clear

Qualifications

• A PhD in Electrical Engineering or a Master’s with ten years of related experience
• Significant coursework and experience in high reliability electronics design: analog/digital electronics, power, RF, satellite subsystems, PCB layout

Responsibilities

• Collaborate with payload, systems, firmware, and software leads to inform design and test trades.
• Lead design reviews and enforce consistent electronics standards across subsystems.
• Inform system‑wide requirements and performance analyses.
• Communicate with sponsors and mentor junior staff.
• Assess technical risk and provide informed recommendations.

Skills

C/C++

MATLAB

Python

Oral and written communication

High-reliability electronics

Education

PhD in Electrical Engineering

Master’s Degree in Electrical Engineering or related field

Job description

MIT Lincoln Laboratory’s Electronics for Contested Space Group seeks a space electronics lead engineer to lead a team of electrical engineers in the design, integration, and test of next‑gen space payloads and systems. You will work on digital, analog, RF, and power designs, coordinating with payload, systems, firmware, and software leads to inform design trades and review outcomes.

The ideal candidate is self-driven, mentored junior staff, and capable of assessing risk with clear