SoC Video Codec Hardware Engineer (FPGA/ASIC)

TikTok Inc.

San Jose (CA)

On-site

USD 162,000 - 317,000

Full time

14 days+

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Benefits offered by this job

Medical insurance
Dental insurance
Vision insurance
401(k) with match
Parental leave
Disability coverage
Life insurance
Wellbeing benefits
Paid holidays
Paid sick days
Personal time

Job summary

TikTok Inc. is seeking a video codec design engineer to design hardware accelerators for advanced video encoding and processing on SoC platforms (FPGA/ASIC). You will contribute to architecture, RTL, and low-power techniques in a collaborative, multi-disciplinary team.

The role requires Verilog/SystemVerilog mastery, EDA tool proficiency, and scripting skills. Prior SoC experience and tape-out exposure are a plus; the team emphasizes high performance and scalable video solutions for billions of

Qualifications

  • Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field.
  • 1+ years of experience in digital front-end design (open to highly promising candidates with less experience).
  • Mastery of Verilog/SystemVerilog and a solid foundation in digital circuits.
  • Proficiency with mainstream front-end EDA tools (e.g., Spyglass, Design Compiler, PrimeTime).
  • Fluent in at least one scripting language (Python, Perl, Tcl, Makefile) for workflow automation.

Responsibilities

  • Architecture Design: Define the architecture of SoC top or subsystems (NoC/CPU/NPU/ISP/Codec) and evaluate Power, Performance, Area during early design phase.
  • RTL Implementation: Write high-quality RTL code (Verilog/SystemVerilog) and maintain design documentation.
  • Front-End Quality Control: Perform Lint, CDC, and RDC checks for code standards and robustness.
  • Cross-Functional Collaboration: Work with Verification for debugging and with Backend/Mid-end teams for Synthesis, SDC, STA, and power optimization.
  • Low Power Design: Develop chip low-power strategies using Clock Gating and Power Gating; support UPF flow.

Skills

Verilog/SystemVerilog
Scripting languages

Education

Bachelor's degree or higher in Microelectronics, Integrated Circuits, Computer Science, Electrical Engineering, or a related field

Tools

Spyglass
Design Compiler
PrimeTime

Job description

TikTok Inc. is seeking a video codec design engineer to design hardware accelerators for advanced video encoding and processing on SoC platforms (FPGA/ASIC). You will contribute to architecture, RTL, and low-power techniques in a collaborative, multi-disciplinary team.

The role requires Verilog/SystemVerilog mastery, EDA tool proficiency, and scripting skills. Prior SoC experience and tape-out exposure are a plus; the team emphasizes high performance and scalable video solutions for billions of

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