SoC Power, Thermal & Limits Architect

Qualcomm; San Diego (CA); On-site; USD 174,000 - 262,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a SoC Limits Management Architect on the HW power team in San Diego to define how next-generation systems balance high performance with physical, electrical and thermal constraints.

You will bridge hardware IP, system software, and product requirements to design a holistic limits management architecture and collaborate with architects, designers and SW teams to evolve architecture and ROI-driven decisions.

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 6+ years ASIC design/verification experience.
• Master's degree with 5+ years ASIC design/verification experience.
• PhD with 4+ years ASIC design/verification experience.

Responsibilities

• Define the SoC limits management by integrating hardware triggers, firmware policies, and software mitigations to protect silicon health.
• Lead cross-functional teams to standardize mitigation features across IP and hardware blocks.
• Drive the long-term evolution of Sensing IPs (Voltage, Current, Temperature) and trigger mechanisms to address escalating current densities and industry trends.
• Design real-time telemetry requirements to monitor silicon behavior and define performance-impact profiles for various mitigation strategies.
• Oversee ROI-based feature decisions and Post-Silicon Validation to ensure physical silicon behavior aligns with architectural intent.

Skills

Power management

Low-power design

Leadership

Architectural design

Product delivery cycle

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

AI

Job description

Qualcomm Technologies, Inc. is seeking a SoC Limits Management Architect on the HW power team in San Diego to define how next-generation systems balance high performance with physical, electrical and thermal constraints.

You will bridge hardware IP, system software, and product requirements to design a holistic limits management architecture and collaborate with architects, designers and SW teams to evolve architecture and ROI-driven decisions.