SoC Power & Limits Architecture Lead

Nutanix; San Diego (CA); On-site; USD 174,000 - 262,000; Full time

Benefits offered by this job

Annual bonus

RSU grants

Benefits package

Job summary

Qualcomm Technologies, Inc. is seeking a SoC Limits Management Architect on the HW power team. You will define how our next-generation systems balance high performance against physical, electrical and thermal constraints.

You will bridge hardware IP, system software, and product requirements to design a holistic Limits Management architecture and guide product definition through early life cycle involvement.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• MS or PhD in Electronics or Computer Engineering, or equivalent with focus on computer architecture and power/performance analysis.
• 6+ years of ASIC design, verification, validation, integration, or related work experience (5+ years if Master’s; 4+ years if PhD).
• Experience with power management and low-power design methodologies.

Responsibilities

• Define the SoC limits management by integrating hardware triggers, firmware policies, and software mitigations to protect silicon health.
• Lead cross-functional teams to standardize critical mitigation features, including Power Telemetry, Estimators, and Droop Detectors, across all IP and hardware blocks.
• Drive the long-term evolution of Sensing IPs (Voltage, Current, Temperature) and trigger mechanisms to address escalating current densities and industry trends.
• Design real-time telemetry requirements to monitor silicon behavior and define performance-impact profiles for various mitigation strategies.
• Drive organizational consensus on feature ROI and oversee Post-Silicon Validation to ensure alignment with architectural intent.

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

MS or PhD in Electronics or Computer Engineering, or equivalent with focus on computer architecture and power/performance analysis

ASIC design

Power management

Low-power design/methodology

Cross-functional leadership

Product lifecycle experience

Job description

Qualcomm Technologies, Inc. is seeking a SoC Limits Management Architect on the HW power team. You will define how our next-generation systems balance high performance against physical, electrical and thermal constraints.

You will bridge hardware IP, system software, and product requirements to design a holistic Limits Management architecture and guide product definition through early life cycle involvement.