SoC Power Optimization Engineer – Automation & Modeling

Apple Inc.; Beaverton (OR); Hybrid; USD 120,000 - 190,000; Full time

Job summary

Apple Inc. is seeking a SoC Power Analysis and Optimization Engineer to drive power simulation, optimization and modeling for Apple silicon.

You will partner with architecture, RTL and physical design teams to select critical use-cases, set power targets for future projects and advance automation with GenAI/LLM techniques. Responsibilities include developing power metrics, deploying optimization across IPs, and refining methodologies to boost efficiency and reliability while interfacing with

Qualifications

• A bachelor's degree in a relevant field and at least 3 years of industry experience.
• Experience with ASIC power analysis and optimization is preferred.

Responsibilities

• Drive SOC power simulation, optimization and modeling.
• Collaborate with architecture, RTL and physical design teams to define use-cases and power targets.
• Develop automated approaches using GenAI/LLM for power analysis and optimization.
• Create power metrics and drive efficiency improvements across IPs and SOCs.
• Review results and refine methodologies to extend power efficiency and design coverage.

Skills

Machine learning

Programming

Verilog

SystemVerilog

Python scripting

Computer architecture

Logic design

Signal processing

Silicon power measurement

SOC power modeling

Low power optimization

Strong communication

Education

Bachelor's degree in a relevant field

Tools

Verilog/SystemVerilog tools

Python

Job description

Apple Inc. is seeking a SoC Power Analysis and Optimization Engineer to drive power simulation, optimization and modeling for Apple silicon.

You will partner with architecture, RTL and physical design teams to select critical use-cases, set power targets for future projects and advance automation with GenAI/LLM techniques. Responsibilities include developing power metrics, deploying optimization across IPs, and refining methodologies to boost efficiency and reliability while interfacing with