SoC Power Modeling Engineer for AI/ML & Silicon Efficiency

Apple, Inc.; Cupertino (CA); On-site; USD 150,000 - 278,000; Full time

Benefits offered by this job

Stock programs

Educational reimbursement

Medical & dental coverage

Relocation assistance

Employee stock purchase plan

Job summary

Apple, Inc. in Cupertino, California, is seeking an engineer for the Silicon Engineering group to model power dissipation at the SOC level, including Neural Engines, CPUs, GPUs, and accelerators.

You will collaborate with architecture, SOC design, and system teams to define power targets and ensure efficient silicon performance for Apple products. You will work with the power lab to correlate models to silicon data, support silicon optimization, and help drive power-aware design decisions across

Qualifications

• Bachelor's degree in a relevant field and at least 3 years of industry experience.
• MSEE preferred.
• Deep knowledge of SOC architecture and power modeling.
• Experience with CPU, GPU, caches, memory and media IPs.
• Scripting and data analysis skills.
• Understanding of VLSI design flow and CMOS technology.
• Ability to understand and model thermal control loops and throttling mechanisms.
• Strong teammate with excellent communication skills.

Responsibilities

• Modeling power dissipation at the SOC level, including Neural Engines, CPUs, Graphics, compute ( AI/ML) accelerators, media IPs, caches and fabric.
• Modeling power dissipation for customer use-cases.
• Interacting with the System designers, Technology team, Silicon Validation, and Product Engineering teams to define power targets at the SOC level, and the power delivery.
• Working with the power lab and test teams to correlate models to silicon data.

Skills

SOC power modeling

Power estimation

Scripting

Communication skills

Education

Bachelor's degree in a relevant field

MSEE

Job description

Apple, Inc. in Cupertino, California, is seeking an engineer for the Silicon Engineering group to model power dissipation at the SOC level, including Neural Engines, CPUs, GPUs, and accelerators.

You will collaborate with architecture, SOC design, and system teams to define power targets and ensure efficient silicon performance for Apple products. You will work with the power lab to correlate models to silicon data, support silicon optimization, and help drive power-aware design decisions across