SoC Power Automation & Optimization Engineer

Apple, Inc.; Austin (TX); On-site; USD 125,000 - 170,000; Full time

Job summary

Apple, Inc. seeks a SoC Power Analysis and Optimization Engineer in Austin, TX to lead automation of power optimization, modeling and simulation efforts across SOCs. The role emphasizes cross-functional collaboration and innovation in power-efficient design.

The ideal candidate has a BS with 3+ years of relevant experience, familiarity with Verilog/SystemVerilog, Python, ML concepts, and ASIC power analysis, plus strong communication skills and a passion for low-power design.

Qualifications

• BS and a minimum of 3 years of relevant industry experience.
• MSEE preferred.
• Familiarity with machine learning algorithms and programming.
• Familiarity with scripting in Python.
• Familiarity with ASIC power analysis and optimization.
• Familiarity with SOC design flow and methodology.
• Familiarity with Verilog and System Verilog.
• Familiarity with computer architecture, logic and circuits design.
• Familiarity with signal processing is a plus.
• Silicon power measurement experience is a plus.
• SOC power modeling, low power design and power optimization experience is a plus.
• Strong communication skills are a pre-requisite as the candidate will interface with a lot of different groups.

Responsibilities

• Drive automation for SOC power optimization and power modeling and simulation.
• Collaborate with SOC power team to automate power analysis and optimization tasks.
• Explore ML approaches to optimize SOC power; assist training data preparation and ML-based power modeling solutions.
• Collaborate with cross-functional teams to deploy automation and review results, improve efficiency and scope.

Skills

ML algorithms

Python programming

Verilog/SystemVerilog

ASIC power analysis

SOC power modeling

Power optimization

Computer architecture

Signal processing

Silicon power measurement

SOC design flow

Communication skills

Education

Bachelor’s degree in Electrical Engineering

MS EE (MSEE) preferred

Tools

Verilog

SystemVerilog

Job description

Apple, Inc. seeks a SoC Power Analysis and Optimization Engineer in Austin, TX to lead automation of power optimization, modeling and simulation efforts across SOCs. The role emphasizes cross-functional collaboration and innovation in power-efficient design.

The ideal candidate has a BS with 3+ years of relevant experience, familiarity with Verilog/SystemVerilog, Python, ML concepts, and ASIC power analysis, plus strong communication skills and a passion for low-power design.