SoC Power Optimization Engineer — Automation & ML

Apple Inc.; Cupertino (CA); Hybrid; USD 150,000 - 278,000; Full time

Job summary

Apple Inc. is seeking an SoC Power Analysis and Optimization Engineer in Cupertino, CA. The role focuses on driving SOC power simulation, optimization and modeling, collaborating with architecture, RTL and physical design teams to set power targets and improve efficiency across IPs.

You will work on automating power analysis, leveraging GenAI/LLM approaches, and contributing to the SOC design flow. Strong communication and a background in ASIC power is valued.

Qualifications

• Bachelor’s degree in a relevant field with at least 3 years of industry experience.
• Experience in SOC power analysis and optimization is preferred.

Responsibilities

• Drive SOC power simulation, optimization and modeling.
• Collaborate with architecture, RTL and physical design teams to define power use-cases and targets.
• Advance automation and GenAI/LLM approaches for power analysis.
• Deploy power optimization across IPs and improve efficiency, runtime, and scope.

Skills

ASIC power analysis

Machine learning

Verilog

SystemVerilog

SOC design flow

Python scripting

Computer architecture

Signal processing

Power modeling

Power optimization

Education

Bachelor's degree in relevant field

Job description

Apple Inc. is seeking an SoC Power Analysis and Optimization Engineer in Cupertino, CA. The role focuses on driving SOC power simulation, optimization and modeling, collaborating with architecture, RTL and physical design teams to set power targets and improve efficiency across IPs.

You will work on automating power analysis, leveraging GenAI/LLM approaches, and contributing to the SOC design flow. Strong communication and a background in ASIC power is valued.