SoC Power Modeling Engineer

Apple Inc.; Austin (TX); On-site; USD 140,000 - 180,000; Full time

Job summary

Apple is seeking an engineer in the Silicon Engineering group to model power dissipation and DVFS points for SOC IPs, including AI/ML accelerators. You will work with architecture, design, thermals, PMIC and system teams to optimize power profiles and ensure model correlation with hardware data.

The role emphasizes scripting, data analysis, and familiarity with low-power digital design and CMOS technology to drive energy-efficient silicon for Apple products.

Qualifications

• Bachelor's degree in a relevant field and 3+ years of industry experience.
• Experience in ASIC power modeling or DVFS design is preferred.
• Strong scripting and data analysis capabilities are required.

Responsibilities

• Model power dissipation and power delivery for IPs and SOC blocks.
• Establish voltages for DVFM states and operating points pre- and post-silicon.
• Collaborate with architecture, design, thermals, PMIC and system teams.
• Coordinate with lab and silicon validation teams to correlate models with HW data.
• Support optimization of power profiles for AI/ML accelerators and CPUs.

Skills

Programming skills

Low-power design

Power modeling

Scripting

Data analysis

Communication

Education

Bachelor's degree

Tools

EDA tools

Python

CMOS process knowledge

Job description

Do you have a passion for crafting new solutions? As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You will be part of the team responsible for designing state-of-the-art ASICs that are integral to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs including AI/ML and the corresponding power rails, peak current requirements and voltage-frequency operating points for upcoming generations of Apple SOCs. This role provides an opportunity to participate in optimization of a variety of leading edge chips for power-efficiency. You will collaborate across many teams including architecture, design, thermals, PMIC and system design to model power and current profiles for various IPs of the SOC, and the voltages-frequency operating points. The job also involves partnering with the lab and silicon characterization/validation and technology teams on correlating the models to the HW data.

Description

Imagine yourself collaborating across many fields, playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization, as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design.

Responsibilities

• Modeling power dissipation and power delivery.
• Establishing voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, compute (AI/ML) accelerators, media IPs, caches and fabric.
• Modeling power dissipation for customer use‑cases.
• Interacting with the Technology team, Silicon Validation, and Product Engineering teams to establish voltage‑frequency design points pre‑ and post‑silicon.
• Working with the power lab and test teams to correlate models to HW data.

Minimum Qualifications

• A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience.

Preferred Qualifications

• Our ideal candidate should have 3+ years relevant experience, programming skills and an understanding of low‑power digital design and power fundamentals. You should also have the following:
• Understanding of SOC power modeling and current demand.
• Understanding of electrical properties of on‑die PDN, power gating, package and system power delivery.
• Skills in scripting, data analysis and experience with EDA tools.
• Understanding of VLSI design flow and CMOS technology.
• Extensive background in EE.
• Ability to understand and model thermal control loops and throttling mechanisms.
• Familiarity with physical design tools for power optimization.
• Great teammate and excellent communication skills.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace.

Learn about reasonable accommodations for job applicants.

Apple accepts applications to this posting on an ongoing basis.