SoC Physical Verification Engineer — AI-Driven Tapeout

Micron Technology, Inc.; Folsom (CA); Hybride; USD 97 000 - 205 000; Plein temps

Avantages offerts par ce poste

Medical benefits

Dental benefits

Vision benefits

Paid time off

Résumé du poste

Micron Technology, Inc. seeks a Physical Verification Engineer in the Heterogeneous Integration Group to define and drive sign-off quality PV flows for next-gen memory-centric SoCs and HBM logic dies.

You will own full-chip PV including DRC, LVS, ERC, PERC, and DFM while collaborating across design, EDA, and foundry teams through tape-out readiness. The role emphasizes debugging rule decks, reliability checks, AI-based PV tools, and ML-driven optimization in a fast-paced environment with

Qualifications

• Experience with full-chip or block-level physical verification for advanced-node SoCs.
• Experience in PV methodologies: DRC, LVS, ERC, PERC, DFM, antenna, and reliability sign-off.
• Experience using industry PV tools such as Calibre, ICV, Pegasus, including rule deck development.
• Working knowledge of RTL-to-GDS flows and their impact on PV outcomes.
• Ability to drive verification closure with global cross-functional teams.
• Proficiency with AI-enabled development workflows.

Responsabilités

• Implement PV sign-off for full-chip/hierarchical designs (DRC/LVS/ERC/PERC/DFM).
• Debug foundry rule decks, manage waivers, ensure compliance with advanced-node requirements.
• Perform reliability verification across power domains (ESD, latch-up, electromigration).
• Run density, metal fill, and CMP checks for 3nm and below to ensure manufacturability.
• Develop, maintain, and optimize PV flows and automation; build regression infra.
• Collaborate with physical design, RTL, EDA, CAD, and foundry teams including TSMC from kickoff to tape-out.
• Demonstrate AI-assisted development workflows.

Connaissances

Full-chip PV

DRC

LVS

ERC

PERC

DFM

Rule deck dev

Python scripting

AI/ML PV

Cross-functional collaboration

Formation

Bachelor's in EE/CE

Master’s preferred

Outils

Calibre

IC Validator (ICV)

Pegasus

Description du poste

Micron Technology, Inc. seeks a Physical Verification Engineer in the Heterogeneous Integration Group to define and drive sign-off quality PV flows for next-gen memory-centric SoCs and HBM logic dies.

You will own full-chip PV including DRC, LVS, ERC, PERC, and DFM while collaborating across design, EDA, and foundry teams through tape-out readiness. The role emphasizes debugging rule decks, reliability checks, AI-based PV tools, and ML-driven optimization in a fast-paced environment with