Senior SoC Physical Verification Engineer – HBM & Sign-off

Micron Technology, Inc.; Folsom (CA); On-site; USD 97,000 - 205,000; Full time

Job summary

Micron Technology, Inc. is seeking a Physical Verification Engineer to own full-chip PV sign-off for 3 nm and below, collaborating across design, EDA, and foundry teams including TSMC. You will drive reliability checks, rule deck development, and ML/AI-based optimization within a fast-paced tape-out cycle.

Applicants should have strong PV methodology experience, RTL-to-GDS knowledge, and a track record of cross-functional communication in a global engineering environment. Relocation available.

Qualifications

• Experience with full-chip or block-level physical verification for advanced-node SoC, memory, or heterogeneous designs.
• Experience in physical verification methodologies (DRC, LVS, ERC, PERC, DFM, antenna, reliability sign-off).
• Experience with industry PV tools such as Calibre, ICV, Pegasus.
• Knowledge of RTL-to-GDS implementation flows (place-and-route, extraction) and impact on PV outcomes.
• Ability to drive verification closure with strong cross-functional communication.
• Proficiency with AI-enabled development workflows.

Responsibilities

• Define and own full-chip or hierarchical physical verification sign-off.
• Develop and debug foundry rule decks; manage waivers and closure.
• Perform reliability verification across multiple power domains (ESD, latch-up, electromigration).
• Run density, metal fill, and CMP checks for 3 nm and below.
• Perform RC extraction and correlate PV results with post-silicon data.
• Develop and optimize PV flows and automation using Python/Tcl/Perl.
• Drive ML/AI-based PV and PPA optimization tools adoption.
• Collaborate with physical design, CAD, RTL, product engineering, EDA, and foundry teams including TSMC.
• Demonstrate AI to develop AI-assisted development workflows.

Skills

Full-chip verification

Block-level verification

Rule deck development

RTL-to-GDS flow

PV tools: Calibre/ICV

AI-enabled workflows

Cross-functional collaboration

Education

Master's or PhD in Electrical Engineering

Tools

Calibre

IC Validator (ICV)

Pegasus

Job description

Micron Technology, Inc. is seeking a Physical Verification Engineer to own full-chip PV sign-off for 3 nm and below, collaborating across design, EDA, and foundry teams including TSMC. You will drive reliability checks, rule deck development, and ML/AI-based optimization within a fast-paced tape-out cycle.

Applicants should have strong PV methodology experience, RTL-to-GDS knowledge, and a track record of cross-functional communication in a global engineering environment. Relocation available.