Senior CAD & Verification Architect — Memory ICs

Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking an experienced Verification Engineer to develop and maintain physical verification workflows for DRAM, HBM, NAND, and emerging memory products.

You will implement Calibre DRC/LVS decks using SVRF, translate design rules into checks, and define test and regression strategies. You will partner with cross-functional teams to define signoff strategies, mentor design teams on verification practices, and contribute to the verification roadmap.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
• 5+ years of industry experience in CAD, EDA, or semiconductor design.
• Experience with DRC and LVS physical verification, IC layout, and process design rules.
• Ability to interpret design-rule requirements and resolve complex verification issues in production flows.
• Proficiency in Python and at least one additional language, such as SKILL, Tcl, Perl, C, or C++, plus Linux/Unix and shell scripting.
• Solid CMOS and VLSI fundamentals, with clear communication and practical debugging skills across global teams.

Responsibilities

• Develop and maintain physical verification tools, flows, and methodologies for DRAM, HBM, NAND, and emerging memory products.
• Develop, debug, qualify, and release Calibre DRC/LVS rule decks using SVRF.
• Translate process design rules into verification checks and define test cases and regression methods.
• Partner with process, design, layout, modeling, and verification teams to define signoff strategies and resolve verification issues.
• Guide design teams on verification methodologies, waivers, and debugging, and provide training and production support.
• Evaluate EDA technologies to improve verification quality, performance, and capacity.
• Automate verification setup, execution, and reporting, including AI-assisted analysis and debugging.
• Lead technical projects and contribute to the physical verification roadmap.

Skills

Python

Tcl

Perl

C++

Shell scripting

Linux/Unix

Debugging

Communication

CMOS fundamentals

VLSI fundamentals

Education

Bachelors or Masters in Electrical/Computer Engineering or Computer Science

Tools

Calibre DRC/LVS

SVRF

nmDRC

nmLVS

RVE

Cadence Virtuoso

Job description

Micron Technology, Inc. is seeking an experienced Verification Engineer to develop and maintain physical verification workflows for DRAM, HBM, NAND, and emerging memory products.

You will implement Calibre DRC/LVS decks using SVRF, translate design rules into checks, and define test and regression strategies. You will partner with cross-functional teams to define signoff strategies, mentor design teams on verification practices, and contribute to the verification roadmap.