Senior Physical Verification Engineer (DRC/LVS)

Micron Technology, Inc.; San Jose (CA); Vor Ort; USD 104.000 - 221.000; Vollzeit

Benefits dieser Stelle

Benefits package

Equity potential

Paid time off & holidays

Zusammenfassung

Micron Technology, Inc. is seeking an experienced verification engineer to develop and maintain physical verification flows for DRAM, HBM, NAND, and emerging memory products.

You will work on Calibre DRC/LVS deployments using SVRF, translate design rules into checks, and define test cases and regression methods. Collaboration across global teams is essential, with opportunities to evolve verification strategies and adopt AI-assisted methods.

Qualifikationen

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent.
• 5+ years of industry experience in CAD, EDA, or semiconductor design.
• Experience with DRC and LVS physical verification, IC layout, and process design rules.
• Ability to interpret design-rule requirements and resolve complex verification issues in production flows.
• Proficiency in Python and at least one additional language, such as SKILL, Tcl, Perl, C, or C++, plus Linux/Unix and shell scripting.
• Solid CMOS and VLSI fundamentals, with clear communication and practical debugging skills across global teams.

Aufgaben

• Develop and maintain physical verification tools, flows, and methodologies for DRAM, HBM, NAND, and emerging memory products.
• Develop, debug, qualify, and release Siemens Calibre design rule checking (DRC) and layout versus schematic (LVS) rule decks using SVRF.
• Translate process design rules into verification checks, and define test cases, coverage criteria, and regression methods.
• Partner with process, design, layout, modeling, and verification teams to define signoff strategies and resolve issues.
• Guide design teams on verification methodologies, waivers, and debugging, and provide training and production support.
• Evaluate EDA technologies that improve verification quality, performance, and capacity.
• Automate verification setup, execution, and reporting, including AI-assisted analysis and debugging.
• Lead technical projects and contribute to the physical verification roadmap.

Kenntnisse

Python

C/C++

Tcl

Shell scripting

Linux/Unix

Communication

Debugging

Ausbildung

Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Cadence Calibre DRC

Cadence Calibre LVS

nmDRC

nmLVS

Results Viewing Environment (RVE)

Cadence Virtuoso

Jobbeschreibung

Micron Technology, Inc. is seeking an experienced verification engineer to develop and maintain physical verification flows for DRAM, HBM, NAND, and emerging memory products.

You will work on Calibre DRC/LVS deployments using SVRF, translate design rules into checks, and define test cases and regression methods. Collaboration across global teams is essential, with opportunities to evolve verification strategies and adopt AI-assisted methods.