SoC Memory Subsystem Architect: High-Performance IP

Bzpp; United States; In loco; USD 151.000 - 252.000; Tempo pieno

Vantaggi offerti da questo lavoro

Medical and dental benefits

Vision coverage

401(k) plan

Paid time off

Employee purchase program

Tuition assistance (after 6 months)

Relocation assistance

Wellness incentives

MBO bonus compensation

Descrizione del lavoro

Samsung Austin Research and Development Center (SARC) and ACL are seeking a seasoned SoC Architect to shape premium chipsets by defining memory subsystem designs, interfaces, and caches. You will drive cross-team collaboration to ensure integration with software and hardware, while exploring new memory technologies and achieving optimized performance, power, and area.

The role emphasizes architecture foundations, memory hierarchy expertise, and strong communication in a collaborative,

Competenze

• Experience designing complex digital systems and SoC memory architectures.
• Strong knowledge of memory hierarchies, interfaces and controllers.
• Understanding of cache policies and tradeoffs between latency, bandwidth and hierarchy.
• Familiarity with CHI/ACE/AXI bus protocols and JEDEC standards.
• Good written and verbal communication skills.

Mansioni

• Define and drive development of innovative SoC memory architectures.
• Create designs and specs for memory subsystems including interfaces, controllers and caches.
• Analyze PPA trade-offs and optimize memory subsystem performance and power.
• Collaborate with software, hardware, and validation teams to ensure integration.
• Document memory subsystem designs and verification plans.
• Stay current with memory technologies and recommend adoption.

Conoscenze

SoC architecture

Memory subsystem design

Memory interfaces (DDR/LPDDR/HBM)

Cache subsystems

Memory controllers

JEDEC standards

CHI/ACE/AXI protocols

Android ecosystem tools

ARM architecture

Technical communication

Formazione

Bachelor’s degree in Computer Science or Engineering

Master’s degree preferred

PhD in a related field a plus

Descrizione del lavoro

Samsung Austin Research and Development Center (SARC) and ACL are seeking a seasoned SoC Architect to shape premium chipsets by defining memory subsystem designs, interfaces, and caches. You will drive cross-team collaboration to ensure integration with software and hardware, while exploring new memory technologies and achieving optimized performance, power, and area.

The role emphasizes architecture foundations, memory hierarchy expertise, and strong communication in a collaborative,