SoC Architect: Coherent Interconnect & NoC Expert

Samsung Electronics America; United States; Presencial; USD 162.000 - 198.000; Jornada completa

Ventajas ofrecidas por este puesto de trabajo

Relocation assistance

Bonus program

Comprehensive benefits

Descripción de la vacante

Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) seek an expert SoC Architect to shape memory and cache subsystems for premium chipsets with a focus on on-device ML. You will design coherent interconnects, NoC fabrics, and high-speed interfaces, collaborating across global teams to drive PPA excellence.

Join a team that defines technology roadmaps for Exynos SoCs, contributing to memory subsystem innovation and seamless IP integration in consumer devices.

Formación

• 15+ years of experience with a Bachelor’s Degree in Computer Science/Engineering, or 13+ years with a Master’s, or 11+ years with a Ph.D.
• Deep expertise in SoC architecture and interconnect design
• Proficiency in cache subsystems and coherence protocols (MESI/MOESI)
• Experience with NoC designs and protocols (AXI, ACE, CHI)
• Experience with high-speed interfaces (PCIe, USB)
• Strong system-level design understanding and optimization
• Proficient in C, C++, Python, and Verilog/VHDL
• Strong communication and collaboration skills in a global team environment

Responsabilidades

• Design and develop coherent interconnect architectures and NoC fabrics.
• Develop interconnect IP blocks including specification, design, verification, and validation.
• Analyze and optimize interconnect performance, power, and area (PPA).
• Collaborate with global teams to define and optimize SoC architectures and ensure integration of interconnect IP.
• Lead moderate-to-complex projects and promote best practices.

Conocimientos

SoC architecture

interconnect design

coherent interconnects

NoC designs

PCIe/USB protocols

C/C++/Verilog/VHDL

team collaboration

Educación

Bachelor’s Degree in Computer Science/Engineering

Herramientas

Verilog/VHDL

Descripción del empleo

Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL) seek an expert SoC Architect to shape memory and cache subsystems for premium chipsets with a focus on on-device ML. You will design coherent interconnects, NoC fabrics, and high-speed interfaces, collaborating across global teams to drive PPA excellence.

Join a team that defines technology roadmaps for Exynos SoCs, contributing to memory subsystem innovation and seamless IP integration in consumer devices.