Silicon Design Verification Engineer, Silicon

Google; Mountain View (CA); On-site; USD 132,000 - 189,000; Full time

Job summary

Join a leading tech company as a Silicon Design Verification Engineer, contributing to innovative silicon solutions that power future products. Collaborate with teams to ensure high-performance designs while shaping next-generation hardware experiences. This role offers a competitive salary and benefits.

Qualifications

• At least 3 years of experience with verification methodologies.
• Experience in developing and maintaining verification testbenches.

Responsibilities

• Plan verification of digital design blocks and collaborate with design engineers.
• Create and improve verification environments using SystemVerilog and UVM.
• Debug tests with design engineers to ensure correct functionality.

Skills

Verification Methodologies

UVM

SystemVerilog

Education

Bachelor's degree in Electrical Engineering

Master's degree or PhD in Electrical Engineering

Job description

Silicon Design Verification Engineer, Silicon

corporate_fare Google place Mountain View, CA, USA

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• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• At least 3 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
• Experience in developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.

About the job

Join a team that develops custom silicon solutions powering Google's future products. Contribute to innovations that impact millions worldwide, shaping next-generation hardware experiences with high performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines Google AI, Software, and Hardware to create helpful experiences. We focus on new technologies and hardware to enhance user interactions, from sensing the environment to improving form factors and interaction methods, making lives better through technology.

The US base salary range for this full-time role is $132,000-$189,000 plus bonus, equity, and benefits. Salary ranges are role, level, and location-dependent. Specifics will be shared during the hiring process.

Note: Listed compensation reflects base salary only; bonuses, equity, and benefits are additional. Learn more about Google benefits.

Responsibilities

• Plan verification of digital design blocks by understanding specifications and collaborating with design engineers to identify key verification scenarios.
• Create and improve constrained random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions and formal tools.
• Debug tests with design engineers to ensure correct functionality of design blocks.
• Achieve coverage goals to identify verification gaps and track progress towards tape-out.
• Work with architecture, design, and silicon teams to define overall verification strategies for SoCs.

Google is committed to equal opportunity employment, fostering a diverse workforce that reflects our users, creating a culture of belonging, and ensuring fair employment practices regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy, or related conditions. See Google's EEO Policy and related resources.

As a global company, English proficiency is required for all roles unless specified otherwise.

Note for recruitment agencies: Google does not accept unsolicited resumes or agency submissions and is not responsible for related fees.