Signal & Power Integrity Engineer - High-Speed Interfaces

NVIDIA Corporation; Santa Clara (CA); On-site; USD 116,000 - 219,000; Full time

Job summary

NVIDIA Corporation is seeking a Signal & Power Integrity Engineer in Santa Clara, CA, to design, simulate and optimize high-speed interfaces and system components. You will model 3D EM structures, run SI/PI simulations for NVLink, USB4, PCIe5, and GDDR6, and develop robust guidelines for PCB and package SI.

The role requires an MS/PhD in ECE (or equivalent) and hands-on experience with advanced tools; you will collaborate across hardware teams and contribute to automation and data analysis

Qualifications

• MS and/or PhD in Electrical and Computer Engineering (or equivalent experience).
• Strong background in applied electromagnetics, waveguides, transmission line theory and signal processing.
• Familiarity with signal and power integrity concepts, design and analysis.
• Exposure to channel SI time domain simulations.
• Hands-on use of 3-D modeling tools like ANSYS HFSS/Q3D, 2.5-D with ANSYS SIWAVE or similar and 2D such as Ansys2D.
• Familiarity with VNA, TDR, DSO, ParBERT and tools like ADS, Ansys Designer, JMP, Matlab, Cadence Allegro.
• Scripting for data post-processing, tool development and/or process automation

Responsibilities

• Craft Signal Integrity solutions for complex system designs.
• Model vias, connectors, sockets, breakouts and components in 3D EM tools.
• Run system-level SI simulations for NVLink 200Gbs+, USB-4, PCIe5, GDDR6, LP5X, and more.
• Improve SI models using data from lab measurements or tool updates.
• Create and review substrate and board layout SI guidelines; post-layout extractions.
• Automate simulations, collect data, analyze and visualize results with JMP or MATLAB.

Skills

Signal Integrity

Power Integrity

3D EM modeling

Python scripting

VNA/TDR/DSO

ADS/Ansys tools

Education

MS or PhD in Electrical and Computer Engineering

Tools

ANSYS HFSS

ANSYS Q3D

ANSYS SIWAVE

Cadence Allegro

MATLAB

JMP

Job description

NVIDIA Corporation is seeking a Signal & Power Integrity Engineer in Santa Clara, CA, to design, simulate and optimize high-speed interfaces and system components. You will model 3D EM structures, run SI/PI simulations for NVLink, USB4, PCIe5, and GDDR6, and develop robust guidelines for PCB and package SI.

The role requires an MS/PhD in ECE (or equivalent) and hands-on experience with advanced tools; you will collaborate across hardware teams and contribute to automation and data analysis