Senior Signal Integrity Engineer – 400Gb/s PHY Design

NVIDIA Corporation

Santa Clara (CA)

On-site

USD 136,000 - 265,000

Full time

10 days ago

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Job summary

NVIDIA Corporation is seeking a Senior Signal Integrity Engineer in Santa Clara, CA to design high-frequency channels up to 400 Gb/s per lane for PCBs, packages, connectors and cables. You will develop layout guidelines and simulate passive/active elements using 3D/2D tools, working in a fast-paced, multi-discipline environment.

The role requires a strong EE foundation (5+ years), deep EM knowledge, and hands-on lab measurement skills (VNA, TDR).

Qualifications

B.Sc. in Electrical Engineering with GPA above 90 or equivalent experience
5+ years of experience
Familiar with electromagnetic waves including transmission line theory
Expert level proficiency with electromagnetic tools (Ansys EM, CST, etc.)
Experience in Lab measurements including VNA & TDR experience
Ability to work in intense environment and manage multi-discipline expertise
Md./PhD in EE is a plus
Exposure to PDN analyses and signaling schemes such as NRZ/PAM-4
Experience with MATLAB, Python, and C
Exposure to Through-Silicon-Via modeling and analysis

Responsibilities

Design high frequencies channels up to 400Gb/s per lane for PCBs, packages, connectors and cables
Design layout guidelines for NVIDIA systems
Simulate passive and active elements in 3D and 2D simulation tools
Work in an intense environment and control multi-discipline expertise