Signal Integrity Engineer — Hybrid, High-Speed SerDes & Photonics

Lightmatter; Mountain View (CA); Hybrid; USD 157,000 - 176,000; Full time

Benefits offered by this job

Health Care Plan

Retirement Savings Matching

Life Insurance

Time Off

Paid Family Leave

Disability Insurance

Training & Development

Commuter Benefits

Hybrid Workplace Model

Equity Grants

Job summary

Lightmatter, based in Mountain View, is seeking a Signal Integrity Engineer to drive next-generation products from concept to development within the SI, PI and Packaging team. This role involves shaping package and system architecture, design, and analysis through lab bring-up to meet SI requirements.

You will collaborate across hardware designers and PCB layout engineers, perform SI analyses for PCIe/UCIe/SerDes, and validate designs with lab measurements.

Qualifications

• Minimum 5 years of related experience in signal integrity.
• Proficiency with high-speed interface analysis and design.
• Experience with PCB design for high-speed interfaces.

Responsibilities

• Plan and execute signal integrity tasks for PCIe, UCIe, and SerDes.
• Analyze channel characteristics (S-parameters, insertion loss, return loss, crosstalk).
• Perform SI simulations (eye diagrams, jitter, equalization).
• Collaborate with hardware designers and PCB layout engineers.
• Assist with impedance matching, termination, and routing techniques.
• Perform SI measurements with lab equipment to validate design.
• Present findings in design reviews and document guidelines.

Skills

Signal integrity

High-speed interfaces

Ansys Siwave

HFSS

Keysight ADS

Python scripting

Impedance matching

S-parameters

Jitter analysis

Eye diagrams

Education

B.S. or M.S. in Electrical Engineering

Tools

Ansys Siwave

HFSS

Keysight ADS

Job description

Lightmatter, based in Mountain View, is seeking a Signal Integrity Engineer to drive next-generation products from concept to development within the SI, PI and Packaging team. This role involves shaping package and system architecture, design, and analysis through lab bring-up to meet SI requirements.

You will collaborate across hardware designers and PCB layout engineers, perform SI analyses for PCIe/UCIe/SerDes, and validate designs with lab measurements.