Signal Integrity Architect: High‑Speed IO & System Design
Micron Technology
San Jose (CA)
On-site
USD 177,000 - 387,000
Full time
14 days+
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Benefits offered by this job
Medical, dental, and vision plans
Income protection
Paid family leave
Paid time off and holidays
Job summary
Micron Technology is seeking an experienced professional for a role focused on early-phase system integrity architecture exploration. The ideal candidate will define architectural strategies for high-speed memory and system interfaces, perform feasibility analysis, and model channel characteristics. Key qualifications include a Bachelor’s degree in Electrical Engineering and over 10 years of experience in signal integrity design. A competitive salary range of $177,000 to $387,000 reflects the seniority required. Benefits include comprehensive health plans and paid leave.
Qualifications
10+ years of experience in signal integrity or high-speed interface design.
Strong hands-on SI modeling and simulation experience.
Deep understanding of transmission lines, jitter, loss, and crosstalk.
Responsibilities
Define SI architectural strategies for high-speed memory and system interfaces.
Perform early feasibility and scaling analysis for future data rates.
Build hands-on channel models across package, board, and system.
Drive end-to-end SI co-design with IO, package, and system architects.
Translate SI insights into electrical requirements and architectural constraints.
Skills
Signal integrity expertise
High-speed interface design
Hands-on SI modeling
Communication of SI trade-offs
Education
Bachelor’s degree in Electrical Engineering
Job description
Micron Technology is seeking an experienced professional for a role focused on early-phase system integrity architecture exploration. The ideal candidate will define architectural strategies for high-speed memory and system interfaces, perform feasibility analysis, and model channel characteristics. Key qualifications include a Bachelor’s degree in Electrical Engineering and over 10 years of experience in signal integrity design. A competitive salary range of $177,000 to $387,000 reflects the seniority required. Benefits include comprehensive health plans and paid leave.