Signal Integrity Architect: High‑Speed IO & System Design

Micron Technology

San Jose (CA)

Presencial

USD 177.000 - 387.000

Jornada completa

14 días+

Una candidatura completa en un minuto

Currículum y carta de presentación personalizados, listos para enviar.

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Ventajas ofrecidas por este puesto de trabajo

Medical, dental, and vision plans
Income protection
Paid family leave
Paid time off and holidays

Descripción de la vacante

Micron Technology is seeking an experienced professional for a role focused on early-phase system integrity architecture exploration. The ideal candidate will define architectural strategies for high-speed memory and system interfaces, perform feasibility analysis, and model channel characteristics. Key qualifications include a Bachelor’s degree in Electrical Engineering and over 10 years of experience in signal integrity design. A competitive salary range of $177,000 to $387,000 reflects the seniority required. Benefits include comprehensive health plans and paid leave.

Formación

  • 10+ years of experience in signal integrity or high-speed interface design.
  • Strong hands-on SI modeling and simulation experience.
  • Deep understanding of transmission lines, jitter, loss, and crosstalk.

Responsabilidades

  • Define SI architectural strategies for high-speed memory and system interfaces.
  • Perform early feasibility and scaling analysis for future data rates.
  • Build hands-on channel models across package, board, and system.
  • Drive end-to-end SI co-design with IO, package, and system architects.
  • Translate SI insights into electrical requirements and architectural constraints.

Conocimientos

Signal integrity expertise
High-speed interface design
Hands-on SI modeling
Communication of SI trade-offs

Educación

Bachelor’s degree in Electrical Engineering

Descripción del empleo

Micron Technology is seeking an experienced professional for a role focused on early-phase system integrity architecture exploration. The ideal candidate will define architectural strategies for high-speed memory and system interfaces, perform feasibility analysis, and model channel characteristics. Key qualifications include a Bachelor’s degree in Electrical Engineering and over 10 years of experience in signal integrity design. A competitive salary range of $177,000 to $387,000 reflects the seniority required. Benefits include comprehensive health plans and paid leave.
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