SerDes IP Systems Engineering Director Cadence

Semiconductor Engineering; San Jose (CA); Hybrid; USD 190,000 - 270,000; Full time

Job summary

Cadence Design Systems (Silicon Solutions R&D) seeks a Systems Engineering Director to lead the Die-to-Die Interface IP team, driving the development of advanced D2D SerDes IP products. This role combines leadership of the D2D Systems analysis group with hands-on technical contributions to project milestones and product quality.

The ideal candidate will guide cross-functional efforts, set technical direction, and mentor engineers while ensuring timely delivery of critical IP components for

Job description

This is a unique opportunityto join the rapidly growingDie-to-Die Interface IP team in the Silicon Solutions R&D Group at Cadence Design Systems. We are looking for a Systems Engineering Directorwho will bea key driver and contributor to the development of ouradvanced D2D SerDes IP products.This role involves leading the D2D Systems analysis team as well as contributing withhands ontechnical development.