Senior Wireless RTL Design Engineer — Energy-Efficient SoCs

Apple, Inc.; San Diego (CA); On-site; USD 175,000 - 309,000; Full time

Benefits offered by this job

Comprehensive medical and dental

Retirement benefits

Discounted products and free services

Educational expense reimbursement

Discretionary bonuses or commissions

Relocation

Job summary

Apple, Inc. is seeking an experienced silicon designer for its wireless SOC group in the United States.

You will help develop energy-efficient wireless silicon with RF/Analog, Systems/PHY/MAC, RTL design, and verification, enabling high-performance products for hundreds of millions of users. The role emphasizes writing specifications from MATLAB/C models, RTL verification, and close collaboration with algorithms and software teams to balance performance and power while meeting aggressive

Qualifications

• BS and 10+ years of relevant industry experience.
• Some fixed-point knowledge and bit-true verifications.
• Understanding of DSP algorithms and trade-offs between performance and complexity.
• Knowledge of energy-efficient/low-power design techniques.
• Able to work in a team and meet aggressive schedules.
• Excellent communication skills and self-motivated.

Responsibilities

• Writing specifications and other documents based on MATLAB/C system model.
• RTL logic design and verification support.
• Running tools to ensure lint-free design.
• Collaboration with algorithm and software team to ensure performance and power efficiency.

Skills

Fixed-point knowledge

Bit-true verifications

DSP algorithms understanding

Energy-efficient design

Team collaboration

Communication skills

Education

BS degree

Tools

Synthesis tools

CDC analysis

Power analysis

Job description

Apple, Inc. is seeking an experienced silicon designer for its wireless SOC group in the United States.

You will help develop energy-efficient wireless silicon with RF/Analog, Systems/PHY/MAC, RTL design, and verification, enabling high-performance products for hundreds of millions of users. The role emphasizes writing specifications from MATLAB/C models, RTL verification, and close collaboration with algorithms and software teams to balance performance and power while meeting aggressive