Senior VLSI/ASIC Architect - Hybrid, Impact & Leadership

Hewlett Packard Enterprise; Sunnyvale (CA); Hybrid; USD 181.000 - 367.000; Vollzeit

Zusammenfassung

The Sr. Principal VLSI/ASIC Design Engineer is responsible for the architecture, RTL design, implementation, and analysis of complex VLSI components and SoC solutions.

This role includes early-stage architecture exploration and leads production-ready designs across networking and compute applications. The position requires strong technical leadership, cross-functional collaboration, and mentoring of engineers while delivering high-quality, scalable designs in a hybrid work model with some office

Qualifikationen

• Advanced knowledge of ASIC and VLSI design principles, digital logic, RTL design, and SoC development.
• Proven experience developing complex RTL using Verilog, System Verilog, or comparable hardware description languages.
• Understanding of ASIC development flows, including architecture, microarchitecture, RTL coding, synthesis, timing analysis, physical design interaction, and design signoff.
• Experience with design modeling, simulation, performance analysis, and empirical evaluation methodologies.
• Strong analytical, problem-solving, and technical decision-making skills.
• Ability to evaluate design alternatives and make recommendations based on performance, power, area, cost, risk, and schedule.
• Experience defining and improving design methodologies, tools, automation, and engineering practices.
• Demonstrated innovation, including the development or adoption of new technologies, methodologies, or design practices.
• Strong written and verbal communication skills, with the ability to explain complex technical concepts to both technical and executive audiences.
• Ability to communicate architectural proposals, design plans, tradeoffs, risks, and results effectively.
• Proven ability to influence decisions across business units, functions, senior leadership, external partners, and industry organizations.
• Strong collaboration skills and experience working effectively across geographically distributed, cross-functional teams.
• Ability to mentor engineers and provide technical direction without direct management responsibility.

Aufgaben

• Lead early-stage ASIC architecture and design exploration for complex networking, compute, and SoC applications.
• Define architectural approaches, microarchitectures, design methodologies, and implementation plans aligned with product requirements and technology roadmaps.
• Design, develop, and modify complex RTL blocks using industry-standard hardware description languages and design practices.
• Drive RTL implementation from architectural definition through synthesis, physical implementation support, timing closure, and production readiness.
• Analyze design tradeoffs involving performance, power, area, scalability, reliability, and time to market.
• Develop and evaluate VLSI components and hardware systems across multiple platforms and product organizations.
• Conduct design reviews and evaluate product designs for compliance with architecture, implementation guidelines, quality standards, and industry best practices.
• Establish operating data and performance expectations through analytical modeling, simulation, prototyping, and experimental evaluation.
• Provide tangible, data-driven feedback to improve product quality, reduce design risk, and mitigate potential product failures.
• Contribute to organization-wide ASIC design architectures, methodologies, and standards.
• Create integration plans for incorporating new technologies, IP, design practices, and implementation improvements into existing architectures.
• Identify emerging technologies, innovations, tools, and external partnerships that support business objectives and technology roadmaps.
• Review material specifications, hardware designs, electrical component requirements, and related technical documentation.
• Collaborate with architecture, hardware, firmware, verification, physical design, systems, software, manufacturing, and external development teams.
• Influence technical decisions made by business leadership, development partners, suppliers, and industry standards organizations.
• Provide technical leadership for significant projects and programs, connecting teams across functions around common objectives.
• Mentor less-experienced engineers and promote design innovation, engineering excellence, and knowledge sharing.
• Serve as an internal authority on ASIC and VLSI engineering, providing consultation across organizations and business units.

Kenntnisse

ASIC/VLSI design

Verilog/SystemVerilog

RTL design

architecture & microarchitecture

Design signoff

Cross-functional collaboration

Ausbildung

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Jobbeschreibung

The Sr. Principal VLSI/ASIC Design Engineer is responsible for the architecture, RTL design, implementation, and analysis of complex VLSI components and SoC solutions.

This role includes early-stage architecture exploration and leads production-ready designs across networking and compute applications. The position requires strong technical leadership, cross-functional collaboration, and mentoring of engineers while delivering high-quality, scalable designs in a hybrid work model with some office