Senior Verification Engineer for DDR5/LPDDR5 Memory

Advanced Micro Devices, Inc.; Santa Clara (CA); Híbrido; USD 140.000 - 180.000; Jornada completa

Descripción de la vacante

Advanced Micro Devices in Santa Clara, CA is seeking an experienced Verification Engineer to lead verification for server memory products, including DDR5, LPDDR5, and DFI interfaces. You will work with hardware, firmware, and software teams to ensure features are implemented correctly and validated across DIMMs.

The role requires strong SystemVerilog, UVM, C/C++, and scripting skills, with a track record in testbenches, BFMs, and memory interface validation.

Formación

• Experience with SystemVerilog/UVM-based verification for memory interfaces.
• Strong collaboration with hardware, firmware and software teams.
• Ability to mentor and lead verification discussions and reviews.
• Proven track record in building verification environments and coverage.

Responsabilidades

• Develop and execute verification plan for DDR5, LPDDR5, and DFI memory systems in server products.
• Comprehend the PHY interaction within HW/SW/BIOs and ensure alignment of FW/BIOS/SW.
• Engage in cross-functional discussions with IP/Domain architects and design engineers for planning and debugging.
• Share verification methodologies and support post-Si performance and power debugging.

Conocimientos

SystemVerilog

UVM

C/C++

Python/Perl scripting

verification methodology

communication

mentoring

Educación

Bachelor's degree +8 years or Master's degree +6 years in related discipline

Herramientas

VIPs

BFMs

GLS

NLP

XPROP

Formal verification tools

Descripción del empleo

Advanced Micro Devices in Santa Clara, CA is seeking an experienced Verification Engineer to lead verification for server memory products, including DDR5, LPDDR5, and DFI interfaces. You will work with hardware, firmware, and software teams to ensure features are implemented correctly and validated across DIMMs.

The role requires strong SystemVerilog, UVM, C/C++, and scripting skills, with a track record in testbenches, BFMs, and memory interface validation.