Senior Memory Validation Engineer (LPDDR5/6 & Automation)

Ambarella; United States; On-site; USD 152,000 - 179,000; Full time

Job summary

Ambarella seeks an experienced memory engineer to own training and calibration of LPDDR5/5X and LPDDR6, ensuring reliable operation across boards and conditions.

You will build automation, collect lab and field data, and drive root-cause analysis with cross-functional teams to improve memory controller robustness and performance. This role emphasizes silicon validation, power-saving feature testing, and production readiness.

Qualifications

• 4+ years in memory validation, memory controller design, SoC validation, or related area.
• Hands-on with LPDDR5/5X and LPDDR6; JEDEC specs familiarity.
• Experience owning or contributing to memory training and calibration code; C/firmware + Python for automation and analysis.
• Practical debug skills on real hardware: lab instruments, probes, boot triage.
• Comfort with large-scale data; finding signals in shmoo, margins, or regression results.
• Ability to work with customers and cross-functional teams under time pressure.

Responsibilities

• Own memory training and calibration code for LPDDR5/5X and LPDDR6.
• Collect and analyze memory subsystem data from lab testing and field platforms.
• Build automation for memory stability testing, speed binning, and regression analysis.
• Debug real customer issues with field and internal teams.
• Turn system behavior into insights to improve memory controller robustness and performance.
• Influence future silicon with data-backed architectural proposals.
• Validate power-saving features across real-world use cases.
• Support silicon bring-up, qualification, and production readiness.

Skills

Memory validation

Memory controller design

SoC validation

Python/test automation

C/firmware

Bench instrumentation

Data analysis

Customer collaboration

Tools

LPDDR5/5X

LPDDR6

Logic analyzers

Oscilloscopes

Protocol analyzers

Job description

Ambarella seeks an experienced memory engineer to own training and calibration of LPDDR5/5X and LPDDR6, ensuring reliable operation across boards and conditions.

You will build automation, collect lab and field data, and drive root-cause analysis with cross-functional teams to improve memory controller robustness and performance. This role emphasizes silicon validation, power-saving feature testing, and production readiness.