Senior Validation Engineer - Processor I/O & Power Management

TPI Global Solutions; San Jose (CA); On-site; USD 120,000 - 160,000; Full time

Job summary

TPI Global Solutions in San Jose, CA is seeking an experienced Electrical/Computer Engineer to join a highly technical team. You will develop test plans and perform functional and electrical validation for new processor silicon interface features, with a strong emphasis on power management.

The role involves executing hardware and software validation using oscilloscopes, logic analyzers and other lab instruments, debugging issues, and contributing to platform definitions.

Qualifications

• Bachelor's or Master's degree in Electrical/Computer Engineering with substantial engineering experience.
• Experience in developing and executing platform level electrical & functional test plans.
• Experience with processor I/O interfaces and electrical characterization is preferred.
• Proven ability to read schematics and layout documentation and use Windows/Office tools.

Responsibilities

• Develop test plans and validate electrical/functional aspects for processor silicon interfaces.
• Execute hardware and software validation using lab instruments (oscilloscopes, logic analyzers).
• Debug electrical/functional issues for new processors.
• Provide input into platform definitions and review designs used in silicon validation.
• Mentor and train less experienced engineers and technicians in planning, testing and debugging.

Skills

Test plan development

Electrical validation

Functional validation

Processor I/O interface debugging

Power management

Mentoring/training

Education

Bachelor's in Electrical Engineering

Master's in Electrical/Computer Engineering

Tools

Oscilloscopes

Logic analyzers

Multimeter

Schematic reading

MS Windows

MS Office

Job description

TPI Global Solutions in San Jose, CA is seeking an experienced Electrical/Computer Engineer to join a highly technical team. You will develop test plans and perform functional and electrical validation for new processor silicon interface features, with a strong emphasis on power management.

The role involves executing hardware and software validation using oscilloscopes, logic analyzers and other lab instruments, debugging issues, and contributing to platform definitions.