Senior TPM for Multi-Die Chiplet Tape-Out

Amazon Inc.; Austin (TX); On-site; USD 177,000 - 239,000; Full time

Job summary

Annapurna Labs seeks a Principal Technical Program Manager to own end-to-end program execution for a next-generation ML accelerator chip. You will connect multiple engineering workstreams into a single coherent schedule, drive cross-functional decisions, and manage dependencies across RTL, physical design, packaging, and infrastructure.

The role emphasizes leadership in a complex, multi-team environment. You will lead weekly status, ensure critical path accuracy, and partner with external IP

Qualifications

• 10+ years of hands-on work managing complex technology projects
• Deep knowledge of the chip development lifecycle: RTL verification milestones, physical design convergence, DFT, timing closure
• Experience managing programs with external design partners and IP vendors
• Ability to build and maintain integrated schedules with real dependency modeling, not just Gantt charts, understanding paths with float

Responsibilities

• Own the integrated schedule and critical path analysis across multiple die tape-outs through engineering samples and production ramp.
• Drive the weekly chip status cadence by synthesizing inputs from RTL/DV, physical design, packaging, power, infrastructure, and post-silicon teams into a single view for leadership.
• Track verification convergence as a leading indicator by monitoring feature completion through RTL closure, bug trends, and regression pass rates by block.
• Manage the external design partner interface, owning the netlist delivery calendar and negotiating schedule trades.
• Drive infrastructure readiness and external IP delivery by partnering with compute and EDA platform teams on capacity planning.

Skills

10+ years project management

Chip development lifecycle

External partnerships

Integrated scheduling

HBM integration

Foundry nodes

ML accelerator silicon

Chiplet / 2.5D/3D

Infra capacity planning

Job description

Annapurna Labs seeks a Principal Technical Program Manager to own end-to-end program execution for a next-generation ML accelerator chip. You will connect multiple engineering workstreams into a single coherent schedule, drive cross-functional decisions, and manage dependencies across RTL, physical design, packaging, and infrastructure.

The role emphasizes leadership in a complex, multi-team environment. You will lead weekly status, ensure critical path accuracy, and partner with external IP