Senior System Virtual Platform Engineer - Pre-Silicon

Ericsson

Austin (TX)

Hybrid

USD 140,000 - 210,000

Full time

14 days+

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Job summary

Ericsson Austin is seeking a Senior System Virtual Platform Engineer to drive virtual platform development for pre-silicon software in a hybrid Austin, Texas environment. The role focuses on developing virtual models to enable on-time SoC verification and early software development.

You will work with diverse teams on TLMs, debugging, test plans, and platform integration, while collaborating with IP and system architects to meet hardware requirements for future ASIC platforms.

Qualifications

  • Master’s degree in Electrical/Computer Engineering, Computer Science, or related field.
  • 5+ years of ASIC/SoC development experience.
  • Strong OOP concepts and C/C++ with modern practices.
  • Experience with build systems and GNU toolchains.

Responsibilities

  • Develop and integrate Transaction Level Models (TLMs) in SystemC/C++ based on hardware specs.
  • Design, develop, and debug test environments for virtual SoCs.
  • Define test plans and coverage metrics for virtual platform releases.
  • Execute co-simulation, root-cause analysis, and system-level debugging.
  • Collaborate with IP/system architects to translate hardware requirements into virtual solutions.
  • Engage with EDA partners on prototyping tools and methods.

Skills

C/C++ programming
SystemC
OO design
Debugging
Python
Agile collaboration

Education

Master's degree in Electrical/Computer Engineering or related field

Tools

GCC
CMake
Git
Jenkins

Job description

Ericsson Austin is seeking a Senior System Virtual Platform Engineer to drive virtual platform development for pre-silicon software in a hybrid Austin, Texas environment. The role focuses on developing virtual models to enable on-time SoC verification and early software development.

You will work with diverse teams on TLMs, debugging, test plans, and platform integration, while collaborating with IP and system architects to meet hardware requirements for future ASIC platforms.

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