Senior SoC Verification Engineer — Hybrid (Austin)

Arm; Austin (TX); Hybrid; USD 162,000 - 219,000; Full time

Job summary

Arm Austin is seeking a senior SoC verification engineer to craft and execute verification strategies for next‑gen compute subsystems. You will develop testbenches in SystemVerilog, verify PCIe/CXL and memory interfaces, and debug complex failures to ensure robust RTL implementations.

You will collaborate with RTL designers, software teams, and project management in a hybrid model, balancing office presence with remote work, and will mentor junior engineers while advancing verification

Qualifications

• Bachelor's or Master's in Computer Science or Electrical/Computer Engineering with 5+ years in design or verification.
• Solid understanding of digital hardware design and Verilog HDL.
• Experience verifying subsystems for PCIe/CXL, DDRx/LPDDRx, HBM.
• Low-level programming in C and Assembler.

Responsibilities

• Craft test plans, develop SystemVerilog/Verilog testbenches and tests, and debug failures.
• Verify RTL for SoC projects.
• Contribute to verification methodologies used by the team.
• Guide and support junior team members and collaborate with design teams.

Skills

Verilog HDL

SystemVerilog

UVM

PCIe/CXL

DDRx/LPDDRx

HBM

Test plan creation

RTL verification

C

Assembler

Perl

Python

Clock domain crossing verification

Power aware verification

Education

Bachelor's or Master's degree in Computer Science or Electrical/Computer Engineering

Job description

Arm Austin is seeking a senior SoC verification engineer to craft and execute verification strategies for next‑gen compute subsystems. You will develop testbenches in SystemVerilog, verify PCIe/CXL and memory interfaces, and debug complex failures to ensure robust RTL implementations.

You will collaborate with RTL designers, software teams, and project management in a hybrid model, balancing office presence with remote work, and will mentor junior engineers while advancing verification