Senior Subsystem Architect, SoC & IP Integration

Ampere; Portland (OR); On-site; USD 182,000 - 273,000; Full time

Benefits offered by this job

Health, dental, vision insurance

401K retirement plan

Unlimited flextime

Job summary

Ampere is seeking a Principal Subsystem Hardware Architect in Portland, OR to lead the definition of scalable SoC subsystem architecture. You will own reset, power management, interrupt, debug, and IP integration across hardware, firmware, and software teams to meet performance goals.

You will translate product requirements into robust subsystem specifications, drive cross-functional tradeoffs, and guide architecture discussions to enable successful product delivery with ARM familiarity and

Qualifications

• 6+ years of proven experience in Subsystem architecture and design, including HW architecture and/or RTL development.
• 3+ years of architecture or design expertise with any subsystems (Ex: CPU; Memory; Graphics/AI; HSIO/LSIO; Power-Management; Security, SoC level Interrupt Architecture).
• Solid understanding of subsystem construction and integration, including reset, clocking, power management, DFT, and debug considerations.
• Familiarity with LSIO interfaces and controllers (GPIO, I²C, SPI, UART, PWM)-and their system-level integration.
• Experience across the full IP lifecycle, from IP selection and integration through silicon validation, performance debug, and bring-up.
• Additional skills highly desired: Familiar with ARM Architecture; Power Management; Reset Architecture; Interrupts Architecture.

Responsibilities

• Drive subsystem construction including component definition and interactions, interrupt generation and integration with the rest of the SoC.
• Translate business-unit and product requirements into clear, actionable subsystem architecture specifications and implementation requirements.
• Partner with hardware, firmware, and software teams to develop cohesive, end-to-end subsystem solutions that address cross-functional dependencies and system-level use cases.
• Collaborate with platform architects, IP teams, and global SoC stakeholders to align architectural capabilities with product roadmaps and performance targets.
• Lead technical architecture discussions and data-driven tradeoff analyses to resolve complex subsystem integration challenges and enable successful product delivery.

Skills

Subsystem architecture

RTL development

IP lifecycle

Power management

Interrupts architecture

Education

BS in Electrical/Computer Engineering or CS (8 years)

MS in Electrical/Computer Engineering or CS (6 years)

PhD in related field (3 years)

Job description

Ampere is seeking a Principal Subsystem Hardware Architect in Portland, OR to lead the definition of scalable SoC subsystem architecture. You will own reset, power management, interrupt, debug, and IP integration across hardware, firmware, and software teams to meet performance goals.

You will translate product requirements into robust subsystem specifications, drive cross-functional tradeoffs, and guide architecture discussions to enable successful product delivery with ARM familiarity and